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电巢直播8月计划
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我建了一个电容 为什么 不能放到原理图中呢?

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发表于 2013-1-4 19:52 | 只看该作者 |只看大图 回帖奖励 |倒序浏览 |阅读模式

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为什么那个C0402-RF 不能放到原理图中?  我刚刚单独建了一个元件就不让放到原理图中 点击那个图标才能放入原理图中呢?7 m6 A$ n% {: G# W& c3 X6 g! u. y! t) `
8 i& V+ a2 \* ]% Z: ?
实在不熟悉这个软件

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124.jpg
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收藏收藏 支持!支持! 反对!反对!

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发表于 2013-1-4 20:40 | 只看该作者
建工程时加入了你的库后,View→DXDataBook里找到相应元件加入

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 楼主| 发表于 2013-1-4 20:56 | 只看该作者
dali618 发表于 2013-1-4 20:40 : k; U# C$ r/ Z% m/ A/ m( @
建工程时加入了你的库后,View→DXDataBook里找到相应元件加入
. u6 N4 z! [4 h. D
感谢已经添加进去了。但是没有 REF  我希望自动添加一个REF  找一个使用的REF添加上去 。例如没有C1没有使用 自动添加一个C1。这个没有REF。, y2 B  N, ^- V6 F6 R
6 ?9 a8 r( U1 y9 m) Q' n$ d
这个继续怎么办呢?

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589.jpg

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发表于 2013-1-4 21:00 | 只看该作者
package操作后就有了

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 楼主| 发表于 2013-1-4 22:13 | 只看该作者
本帖最后由 wanruyi 于 2013-1-4 22:40 编辑
' m- D4 h& a& t6 T( [# W! Z
4 j3 m, t* p/ A0 a) aEE   9 K" D$ w% z! z# D4 Q

. E( n% z) |7 _WG  我有本的WG的书籍 对着  书操作  结果这个EE7.9.4  和书上的差异太大。' \/ M# b4 j' g* M

! v/ f  p, I5 H8 r1 |1 L学习进度缓慢。  这个软件难学。没有十足的信心  还是不碰为好。
! P( I! S' Y0 ]6 y( E) P, k5 q5 n8 J+ h6 U; D1 {. h2 v
打包 出现如下问题:
8 d5 L. ]6 S' W( b
1 y; b, @1 y: a% \! f0 b4 r' S$ c不知道哪里卡住。  能不能解释一下 这个新版本的打包命令。
* {3 Q; V9 K0 e
  I" l7 ~5 I1 c! q; O网络表也生成不了。  ?. W8 Y2 t& N5 Y9 i
' O- R+ i5 O0 j& I2 l
The Central Library is at "C:\Users\WANRUYI\Desktop\Center_Lib\Center_Lib.lmc".
  K" _9 T3 H2 G; O0 Z
8 O& O5 O( g0 _0 x) a; @3 TUnable to determine the Disable Repackage status.  A5 t7 j/ b/ D0 P( N% I7 v
!Repackaging will be allowed!9 t2 y7 Q' O3 J+ p$ c3 Z
* [! K8 R; x7 K
The PDBs listed in the project file will be searched to satisfy the parts
0 C/ x2 [5 R* ~& r$ D! n; z  `requirements of the iCDB only for parts not already found in the
8 @5 o% `. K" n" Y6 kTarget PDB., J, P: }, r0 V+ G" W- }6 Y. g7 z

% L/ I/ [/ F' `; vThe AllowAlphaRefDes status indicates that reference1 X2 X( |, U" f
designators containing all alpha characters should be deleted
2 |5 W( S5 G) K, U& _/ z$ @and the relevant symbols repackaged.
1 U7 Z0 `! O9 d0 M+ K& C- T# }/ `3 _' V
All existing reference designators and frozen properties will be ignored
7 K/ C( G7 f7 l' H3 ?7 A( hduring packaging except for those on symbols within Reusable Blocks.+ z7 h& A% J! U! H
Only the Room and Cluster symbol properties will be read for the purpose0 u9 ^+ U% E  r
of user designated packaging. Use with the -y option if back annotation
' V; U7 I# S- W: j9 a8 x8 \$ Kto the Common DataBase is not desired.
5 }" P) `' [* ]5 F/ k  x/ V4 E6 a* x$ y( T. ]8 j3 q! H- n  n
The cross mapping of symbol pin names to Part Number pin% p4 X' G# f& U7 e( c* j) _
numbers will be checked for packaged symbols and mapped correctly
& z7 o2 ]$ O( v  U5 e  ofor unpackaged symbols.5 v! M9 s" l% M5 a6 F

) ]/ Z' k( E' I5 O: IProperties that have been checked off in the Property Definition Editor" x+ T# J: p: z7 p% V+ M
found at Library Manager/Common Properties will be checked for value6 V( f1 ?8 _4 {( P
differences between the PartsDB and the non-null properties on symbols.
! i' \4 x; c) h- ZThose properties checked off (other than Part Number)
/ F! M( R+ V# g- |" L8 fwill not be transferred from the PartsDB to symbols.: j' p% Y2 N9 j; }" W) d
The following properties were checked off in the Property Definition Editor:7 x9 Y& m/ J& S# p
"Pkg Group"0 @( J& c2 ~" ^$ i
"EPFIXEDWIDTH"
" C. i# D6 n. [" f0 @% t"EPFIXEDLENGTH"
; i0 P/ n. h5 y! x"Term"$ l0 n% p3 J7 I' P
"SIM_MODEL"
" J4 m3 s, A! u& j  Z3 W7 g"SIM_MODEL_FILE"
5 a" W- v; P' o"Array Component"
' g; O. G4 f9 e0 d% m( p- e"ICX_PART_MODEL"
# F; U4 l& `4 D( V8 E"Use Verilog"
+ o3 z3 ]. W% r9 Q9 n0 h"Order"# [6 s0 n. ^7 B& t
"Parametric"
; @( d  @0 S1 G"Value2"' k) @$ R! Y+ C5 K. k  {& F
"Tech"
$ [0 a2 w; S7 [8 m- E5 M"IBIS"
0 l. b2 _  E# R% A' \( Q"VHDL Model"5 h3 N0 W9 m2 r
"Verilog Model"" K- |2 @$ C; h5 D/ y
"Tolerance"
' ]6 g/ z7 ]. E' C$ W+ q' M* G"Value"
; u; I0 G4 F# O6 \5 l" F# d/ {) X3 e: \: a  y. M# l) S
Checking for errors in the ICDB...
# X( D7 |6 I  l8 C5 x- q. `5 u( p" C, o+ D  n
No errors found. Proceeding with packaging...
# J2 w2 V; r9 o( s6 i& r7 E# q: J, v. a  F6 z
  A0 b0 Z, a* H* l- }9 I: d2 G9 O9 x
  [& ?  m3 `+ \8 ^! n7 b

& R& l7 G& d) \! [5 I6 E/ ? ERROR: Block page1, Page 1, Symbol $1I34:3 U" [' V4 ]5 p. W* v$ u" D
No part data.
. x- X, U2 \: I  [5 NNo Part Number, Part Name, nor Part Label has been entered.
# |! J# F# y! S- {# a1 vPlease enter some data to enable packaging.
  a/ G. {6 {8 e& o# C' U! w& N. u5 z

5 u8 T1 A4 X& B( S0 t# t ERROR: Block page1, Page 1, Symbol $1I36:
5 l- c* U& G, n" k7 d/ \No part data.
% \* Y! I5 U- kNo Part Number, Part Name, nor Part Label has been entered.
. W  {4 v  B$ o3 X$ k! a. B5 y+ I, TPlease enter some data to enable packaging.+ N# i6 a3 F3 v! c

4 @$ U- G# C" z7 e) X0 z- F/ a; Z9 e; x8 w6 c& y% n$ B
ERROR: Block page1, Page 1, Symbol $1I37:3 Y& z5 K: A/ a# t, z5 o
No part data.& {' w5 u( N' h+ b1 W9 \
No Part Number, Part Name, nor Part Label has been entered.
4 B( p" z1 C/ bPlease enter some data to enable packaging.
+ ~  U2 ^* N# Q! a0 G3 D7 t. ~2 H  r

; R4 i6 V& H! T ERROR: Block page1, Page 1, Symbol $1I38:: R4 L/ ]$ X4 S" J# }; n. B( a
No part data." t* D4 R8 [5 i$ V9 k( t! a
No Part Number, Part Name, nor Part Label has been entered.  P8 X$ f% m5 N) n4 E+ T- j$ R
Please enter some data to enable packaging.& m; t2 M: |2 [/ Q5 A% H. p
1 l/ v0 d" c# B7 C8 o3 m

6 t4 W0 J4 K1 ^  r ERROR: Block page1, Page 1, Symbol $1I39:
+ K$ b. |+ t/ s% ^No part data.6 A! E% H! S: d. j/ o  T
No Part Number, Part Name, nor Part Label has been entered.
3 A4 ?7 C* i6 v5 `# c, L* VPlease enter some data to enable packaging.
4 q4 I8 X8 U, z9 I5 X# W
# r: s  Q/ @8 ]# lErrors encountered while reading the Common Data Base.& _6 A! a$ R2 R. D7 {" {

) C3 ^7 l' G9 N& u% j/ s: I0 w6 T' R9 _' a1 G) H* E: A% K  M
Testing of Packaging is being terminated with 5 errors and 0 warnings.
6 d! D; l! Q" f5 ?. [. ~Design has NOT been packaged.
  Z) l6 O5 p5 W, C/ _8 Y" f5 p+ r$ q
There have been 5 errors.
8 r1 z* q5 H* D2 B2 C) F2 _2 c. S; v# @& X
Copied from Log File: Integration\PartPkg.log
2 _2 q& Q* o( A' E* U$ k( t, D$ v" x: M% D$ `! g
' ^) s9 S" b: s: K; L1 n
-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
, Q! q& n( P% \* |9 A$ X! Y0 h3 ^6 O4 _, q! T0 Y3 ~
Finished C:\MentorGraphics\7.9.4EE\SDD_HOME\wv\win32\bin\packagerui.exe2 a  Q1 L& c0 N5 ?
Started C:\MentorGraphics\7.9.4EE\SDD_HOME\wv\win32\bin\packagerui.exe C:\Users\WANRUYI\Desktop\wg2\wg2\wg2.prj /d Board1 /nobrowse /config "C:\WDIR") `9 _0 X$ W( H0 W% n3 o3 g
0 A$ G; b! s8 w( V# W1 E
Packager Version: 020806.008 J" X4 ]- x, ~" V- @. g5 C

2 O! l% X2 @6 u8 e/ b3 i# q( ]# l7 YCommandline is: "C:\MentorGraphics\7.9.4EE\SDD_HOME\wg\win32\bin\package.exe -jC:\Users\WANRUYI\Desktop\wg2\wg2\wg2.prj -nBoard1 -i -a -NoFill -Add"0 V) Y( t4 T9 b, n/ z
1 n# N! o: H3 Y4 ?0 n
The Common Database is at "C:\Users\WANRUYI\Desktop\wg2\wg2\database".
$ S3 V0 w1 S, T' }9 I& j7 o- Q8 ~
/ U+ k+ i$ `& w& {( i* {7 qThe Root of this design is "page1".5 \$ {* T' j: g/ v" r
* \6 E# X: W  v
The Front End Snapshot of this design is "DxD".2 Z, }5 j/ ^2 V/ R6 t3 h: U4 a
) z1 [. K3 S& l; ?- ^& W4 c
The Central Library is at "C:\Users\WANRUYI\Desktop\Center_Lib\Center_Lib.lmc".* Z$ |0 Q( s6 _+ P. _+ f6 y- S

9 |, B& @, e! j  a7 J. @& n2 K) |Unable to determine the Disable Repackage status.
& U7 Y  f! C; o; _  Y!Repackaging will be allowed!
' M6 Z/ W/ E) r1 q7 A6 y3 K! O
$ M- {  M4 l. H" kThe PDBs listed in the project file will be searched to satisfy the parts3 N/ e, t  ]+ c  U' g: }$ O# T! f
requirements of the iCDB only for parts not already found in the$ j) `4 B2 R2 i
Target PDB.% ~. [1 l3 V' ^; d/ p4 O
; c' ^5 V, W# F' K/ h
The AllowAlphaRefDes status indicates that reference  E) [7 Q, x4 \6 }6 k
designators containing all alpha characters should be respected.
' a3 F& M& ]6 h7 W) ~+ l
' }) |' Y. w, \: A. L9 W# ?9 kAll existing reference designators and frozen properties will be ignored. F3 G9 ?$ x: ]: o
during packaging except for those on symbols within Reusable Blocks.
: p: {1 X) S5 `, H1 oOnly the Room and Cluster symbol properties will be read for the purpose
5 k8 C. k6 i% A( }of user designated packaging. Use with the -y option if back annotation4 L" ]* @# T6 H) k2 F; ~
to the Common DataBase is not desired.1 @& i2 k6 E7 }/ N& T5 i0 N
' y+ h& U& A/ F& B# y' M
The cross mapping of symbol pin names to Part Number pin8 s1 h9 c4 Z' E$ E
numbers will be checked for packaged symbols and mapped correctly3 p+ y9 Q# |. w5 W- T
for unpackaged symbols.
: E6 N- t' R! O6 G2 w' q0 R8 y
( l( u9 k  i8 i8 w# b: r9 v8 kProperties that have been checked off in the Property Definition Editor
' S# A$ ?& }; _: E) Wfound at Library Manager/Common Properties will be checked for value
* C3 j& z2 D6 l3 F. ndifferences between the PartsDB and the non-null properties on symbols.2 ^  X: `2 V* l4 m1 T" J/ n: Q# |9 o' w8 X
Those properties checked off (other than Part Number)& `5 D5 s1 U5 a7 q
will not be transferred from the PartsDB to symbols.4 _3 j4 A* |0 G0 h
The following properties were checked off in the Property Definition Editor:7 p, D' H$ P. |+ W
"Pkg Group"3 r7 x) J$ `: z" B- F9 U
"EPFIXEDWIDTH"
0 n9 ~$ g$ J) m- b"EPFIXEDLENGTH"
% }1 y7 V0 {. x% B9 q8 _"Term": d* c' I: H. r+ w! X: K  G/ g
"SIM_MODEL"# G, p( J& l  l; X: T
"SIM_MODEL_FILE"
. f- ?2 F; s, x6 K0 U"Array Component"$ {8 M* E4 F& u
"ICX_PART_MODEL"" Z+ L# I7 Y- n$ @
"Use Verilog"5 ]' p* @- f6 q6 e; s
"Order"- S, |) k  k+ N) v5 k' q
"Parametric"
: |+ f; V: _4 g+ C- z$ L"Value2"
! s  w2 I# a% j"Tech"( o9 F% ?, L0 L+ F3 a4 `5 g8 S, v0 @
"IBIS"
9 c) e( X6 i6 ~"VHDL Model"# G# S$ _+ N( x
"Verilog Model". X" i, Y3 L# ?0 Y3 h% @
"Tolerance"$ w6 A5 X2 c% O  V
"Value"% Y( K7 m: A$ o8 K; x3 c) I* ~. O% S
2 y3 Q6 `: q1 h# i

* p8 _) h% B6 b, t, N* [. ]# _+ @: o/ tTesting of Packaging is being terminated with 6 errors and 0 warnings.& v9 v7 N$ @# m, |3 X* S1 U
Design has NOT been packaged.
; m, R; ^/ F$ c/ z! h4 d  i! M1 Z. m* V
Writing to Log File: Integration\PartPkg.log
0 c* T) N  G8 q) W% g# n  v! F( v4 m. s- }6 J! G
There have been 6 errors.
* p" e# _: D% t( g5 b% h, E0 v% z: V, S  P5 F7 D: C% _
///////////////////////////////////////////////////////////
7 Z8 y9 _" K) l8 h//////////////////////////////////////////////////////////// x9 a0 x* t* d6 }" m; U3 \$ ^
///// The Log File will now be copied to this window. /////8 ]1 `9 A  }3 _8 o) R5 K9 x6 y
///// Therefore the data above will also appear below /////+ h& H$ Y$ q2 A0 r% `+ X: k4 v
///// with more specific error and warning messages. /////: R: U7 g0 b4 r- i+ m5 f5 W
///////////////////////////////////////////////////////////
8 D4 s. ^& r  A6 @1 }///////////////////////////////////////////////////////////
1 X$ W1 R. X- j
9 v1 ~' x, Q7 @1 m) ]) z
$ ?0 b4 O6 a1 G1 O& i: \Packager
' l6 d# X5 c* ]$ ?" u8 v6 T--------
, X2 f$ U& s, R7 n
/ Q' N# b3 z# o/ H: o2 U' {10:26 PM Friday, January 04, 2013
! [3 d/ j$ n% e& v3 B* u- P- MJob Name: C:\Users\WANRUYI\Desktop\wg2\wg2\wg2.prj
3 J0 ]( l. `5 U! L
3 y6 G4 }# ?$ A# r
( L6 a; ?: F+ [) A' QPackager Version: 020806.00
5 a$ ?+ K& [# o0 `$ q
" }. s* a- [: lCommandline is: "C:\MentorGraphics\7.9.4EE\SDD_HOME\wg\win32\bin\package.exe -jC:\Users\WANRUYI\Desktop\wg2\wg2\wg2.prj -nBoard1 -i -a -NoFill -Add"
% x- }# W2 Y  S! d% R; U* o. |& v' [3 U# _1 {, G8 T$ R. ?: m; l
The Common Database is at "C:\Users\WANRUYI\Desktop\wg2\wg2\database".) j5 d8 v. I3 Z7 o8 i2 m& w

! }6 t* A7 J" B3 F7 ^* g: T: T' ^The Root of this design is "page1".
$ G6 S3 m! J0 x& D( u: \1 B+ j# j
The Front End Snapshot of this design is "DxD".
$ m$ D5 n/ z" i1 h- H
1 o+ Q: t! Q; ]; h8 \& iThe Central Library is at "C:\Users\WANRUYI\Desktop\Center_Lib\Center_Lib.lmc"./ J& m4 y% q; |! l1 q5 M0 U

, Y3 X5 `2 T1 H) g9 J: cUnable to determine the Disable Repackage status.
4 b, ?9 c  Q1 o5 j5 }( f7 E9 u8 k!Repackaging will be allowed!
4 s! o/ [/ d8 S" P9 S. i
0 i' t$ [8 M' v# n1 l$ {5 GThe PDBs listed in the project file will be searched to satisfy the parts8 @" t: A9 ]7 x7 d+ q. X' U: c& ]7 \
requirements of the iCDB only for parts not already found in the7 u& s- r3 J9 n1 d6 v- R( ?
Target PDB.
+ U* b- L$ e5 S& X1 C4 V7 ^% ^1 Y+ p5 A+ w4 m+ S; B& U9 f4 C( N
The AllowAlphaRefDes status indicates that reference5 h5 l* w4 f5 j; x$ r  M
designators containing all alpha characters should be respected.1 C+ W0 r% j* j3 O0 p) n+ F

" k/ g- M! y( |' Z9 KAll existing reference designators and frozen properties will be ignored, C  C: \$ \+ A. D/ F: c6 H
during packaging except for those on symbols within Reusable Blocks.4 M; O0 Z. b! q
Only the Room and Cluster symbol properties will be read for the purpose
/ X4 y6 p+ `! y5 r0 X9 }4 j' I2 `of user designated packaging. Use with the -y option if back annotation: x( h" N& f; d2 J9 {
to the Common DataBase is not desired.
# T; o5 O2 d. h& w9 `+ q! ], B) b. T( b9 J
The cross mapping of symbol pin names to Part Number pin8 ^  M/ y; d$ u  l+ }9 ?0 w- l0 X
numbers will be checked for packaged symbols and mapped correctly- v# \8 i6 u9 k3 E
for unpackaged symbols.
' H. g9 G# \7 E8 U! i& {- b
5 |! T1 T5 X- M$ ~& P7 B3 fProperties that have been checked off in the Property Definition Editor
# l* ]- `# r5 c8 }2 ]. o4 i+ X* ofound at Library Manager/Common Properties will be checked for value
3 I' `3 W$ f- a- U. ndifferences between the PartsDB and the non-null properties on symbols.
% }4 b6 }5 W1 t, N& PThose properties checked off (other than Part Number)
1 [' H9 a2 [, m' v' s6 p) _will not be transferred from the PartsDB to symbols.! X& j$ ?- C& c! ]$ J, q3 x) g& X
The following properties were checked off in the Property Definition Editor:& u' z  D9 ]+ b6 b$ _; V! \# W
"Pkg Group"6 b# G! Q. Q; j  R6 R7 Q; E
"EPFIXEDWIDTH"  A% r2 x0 V$ Z! |( y* G) A1 ]
"EPFIXEDLENGTH"
5 g4 ]% |  R/ D" Q% j"Term"% v) ^! }7 L# [0 c
"SIM_MODEL": s& P. q2 m. l/ J  I
"SIM_MODEL_FILE"( c4 u0 |' N0 r9 |) E$ i% w" M- w
"Array Component"% Z4 y: b6 @4 c" d+ B
"ICX_PART_MODEL"# y! I! A9 b' S+ O! p3 M# s8 K2 ^
"Use Verilog"
% q, G3 j' d7 {  m"Order"
4 [6 ^& E5 v, Z' V, K"Parametric"2 P7 L0 Q/ u7 F% w% w' Q. y& \
"Value2"
) o5 f1 e" K1 G8 Y8 F"Tech"& O5 B) P) _+ j; V9 x- g
"IBIS"
. B( L9 N  }$ P/ H1 z0 x9 t"VHDL Model"
6 R2 U& k1 L9 D"Verilog Model"( z7 b& o0 j7 S. o
"Tolerance"
7 Z" s4 v( q( J4 R3 [& _"Value"
' k, i8 w1 f8 s
' T* t8 I( P0 MChecking for errors in the ICDB...
- Q, ?, D" D' r+ D9 K+ L* u* r& @0 a2 \! ^4 a: z
No errors found. Proceeding with packaging...
" r5 D: }* V& o$ }  C
3 S5 W2 ~3 C, U9 o4 D9 [# {) H3 x3 k5 Y& S# g5 ^2 W

, B8 N, n% f4 Y) C+ r
# m0 k8 ^& \) k' l ERROR: Block page1, Page 1, Symbol $1I34:$ C1 \! D9 ^) J3 l) E. u$ G
No part data.
: o$ L# d" [( [% ~  H$ lNo Part Number, Part Name, nor Part Label has been entered.  t7 O7 ^) ~4 x" H
Please enter some data to enable packaging.- H; M' W5 {. t5 z

" i, K8 O" l! P0 V% ?" G8 d; I9 x" x% C+ G+ s& |7 i
ERROR: Block page1, Page 1, Symbol $1I36:8 Y6 g. J6 T5 E1 a! K0 R3 E3 ?
No part data.
9 }3 o7 @0 y- d% T. cNo Part Number, Part Name, nor Part Label has been entered.$ i2 P) {9 ]! k( n
Please enter some data to enable packaging.
- t! u0 F3 y* |! `. K( C8 K2 A7 I+ r, @' G

/ r5 w* T- R; _ ERROR: Block page1, Page 1, Symbol $1I37:" `5 j1 \0 y3 W- f* E6 a
No part data.) f2 N/ f! b+ ^8 }  C
No Part Number, Part Name, nor Part Label has been entered.
% G% z! S1 f( j* r& NPlease enter some data to enable packaging.8 ^( U1 q6 ^5 I% \

+ c2 @# L. Y8 M  [  W3 N: N, ^# n& s7 l5 w
ERROR: Block page1, Page 1, Symbol $1I38:4 l$ e% c  _- h6 N
No part data.0 ^) J) {7 ~- P( n# w& ?" L3 h: }
No Part Number, Part Name, nor Part Label has been entered.1 c# e( ^' x. l4 w4 X  z: [5 `
Please enter some data to enable packaging.
5 J' R$ u  t. O  ^5 Q" q2 {4 @( ?- u0 k; t) N

( F2 T1 A5 A& V8 E+ E3 n ERROR: Block page1, Page 1, Symbol $1I39:4 `( @: ~8 C; G0 k# p
No part data.3 a% m$ d; Z7 b. S6 c/ V
No Part Number, Part Name, nor Part Label has been entered.+ V# G. s" o9 v4 V, e4 |
Please enter some data to enable packaging.
3 R3 i1 s) T' C+ G9 [( G2 p1 s# K& Q- O4 d* A3 N( L

; Y! q% A5 D: p; w  | ERROR: Block page1, Page 1, Symbol $1I42:
3 M4 [' B8 V0 Q- M, H2 tNo part data.- _5 Q+ Q# w9 n; h% x9 h
No Part Number, Part Name, nor Part Label has been entered.
4 ^4 @. P. P) p/ |* w. FPlease enter some data to enable packaging.
; [! [9 M, G* D! Q/ Q2 t
& x. [5 C2 l8 r& a, \/ w+ R9 z5 e

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4587.jpg

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发表于 2013-1-5 02:21 | 只看该作者
本帖最后由 li_suny 于 2013-1-5 02:22 编辑
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Mentor的工具比较讲究流程,习惯了就很好学习了。
: w: \2 {/ R  B. e- u+ F我推荐的那本书你可以参考一下“中心库的建立及管理”、“原理图输入”等相关基础章节。. i# f* D5 O% W% @
https://www.eda365.com/thread-77797-1-1.html

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发表于 2013-6-2 15:56 | 只看该作者
wanruyi 发表于 2013-1-4 22:13
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WG  我有本的WG的书籍 对着  书操作  结果这个EE7.9.4  和书上的差异太大。
* V2 q" O  g$ ~. D1 S' N
楼主的问题解决没有,我也遇到同样的问题

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发表于 2013-6-2 18:32 | 只看该作者
wanruyi的问题是向库中加入新器件的操作有误,我看到的5#的系统提示是:没有Part Number、Part Name、Part Label等项,我看还缺Reference Designator项。- _* A! V- J" a  |6 \9 {
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可以参考6#的书,或者这里
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