G, b/ Y# f0 [3 R; y/ U, c
在check errors/warnings时提示如下warning: Y' B) h! V& n8 T) i; a$ m
WARNING [Open Net]: Net GND contains two or more disconnected sections. P% B7 \* N1 m4 g& H. ~* ~+ h& t1 g4 Z请教一下，这可能是什么原因。
I think you need to check the spd file at high desity connection region for Power and Gnd net plane, q, a! y5 h, @5 N9 U) A2 }; x% Obecause spd file maybe have big clearance on gnd & power plane cause the Open isssue but the layout file is still correct without open issue (or big clearance inner plane layer). please zoom in at high desinty region to check whether power or gnd plane is open issue. $ M) j1 v" \8 Q) T7 d( {0 ] M
! D) } ~$ O" F+ C
this case is flip chip substrate case right ?
/1 
发表于 2013-10-16 17:42
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