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发表于 2014-11-16 10:34
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DATE: 11-14-2014 HOTFIX VERSION: 0397 N8 w8 k( v0 o, Y. h
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0 ? l' ~5 o* l8 g4 m& HCCRID PRODUCT PRODUCTLEVEL2 TITLE
$ ]" U1 w ~4 h. ?$ T===================================================================================================================================, Y8 O+ G7 S% D' i; E8 C P- _; R
1213239 FLOWS PROJMGR SPI_ERROR: Missing closing quote at line 41 in""
! k1 e% h) W1 {' T- y6 A- l1301262 SPIF OTHER When creating .dsn file for designs containing netclasses with net groups, PCB Editor stops responding.% Z8 A" s9 z& T" g9 g* x; }, {% |) v
1301469 CONCEPT_HDL CORE DE-HDL Import Design - Need a directive to enable the "Retain Hard Packaging Information" option by default
8 q( b& V* O" K4 C1309535 SYSTEMSI ENG_PBA PA5700: Cannot print, save, or post process SI analysis reports$ r. L% Y; n% X) C; r) M' s
1317019 SIG_INTEGRITY LIBRARY Buffer model for pins not changing correctly when multiple DML files are present in working directory.
; _* n9 g1 u3 y1 n1318452 ALLEGRO_EDITOR DATABASE Derive Connectivity does not update connections; DRC errors thrown
7 h+ b+ D7 l& i1318610 CONCEPT_HDL CORE DE-HDL does not re-validate/re-read DML files on disk upon launching Constraint Manager M5 z' [5 B; D. x* z9 E8 @
1320997 CAPTURE SCHEMATIC_EDITOR Copy paste of multiple images are stacked in same place.
0 j& e0 v. n: H. {1321377 FSP GUI FSP crashes while performing copy-paste operations between different arrays in the Rule text editor% {- k3 ]8 `! ]4 O
1321513 ALLEGRO_EDITOR SYMBOL Preview not available for DRA
. n! P% \. b; l$ k1324479 ALLEGRO_EDITOR OTHER Option specified in license_packages_allegro.txt file but missing in license server causes Segmentation fault on LINUX; A, n- I# i d6 R- V
1327962 FSP MODEL_EDITOR Need ability to select multiple pins in the Preview area of Rule Editor) E6 s+ v' b& Q
1328633 CONCEPT_HDL CORE On running Save All, changes were partially saved before DE-HDL crashed.
h7 o3 ^. q; }( t1328921 ALLEGRO_EDITOR DATABASE Running Derive Connectivity followed by Database Check throws SPMHUT-17 error$ H0 ^2 W2 q3 t, O3 E* z4 L
1330029 CONCEPT_HDL CORE PIN_TYPE and PINUSE attributes not updated consistently in DE-HDL design) k' d, m. O, f9 Q9 k0 j
1330580 SIP_LAYOUT SYMB_EDIT_APPMOD When adding a pin using the Symbol Editor the Pin Name is being changed if duplicated
# W0 F7 H, E( ~+ u4 n5 o, g5 i6 }1331028 CONCEPT_HDL CHECKPLUS Rules Checker fails on DE-HDL component.
5 ~! p# F; ^' H; }: f1331051 ALLEGRO_EDITOR INTERFACES Soldermask layer is mapped to both Soldermask solderPaste and Miscellaneous Image Layers columns using IPC-2581B
# l3 l8 ?( H7 H$ Y1333127 CONCEPT_HDL CORE Sheet number in the new window is only the block-level number and not the design-level number
6 N1 N3 b# T U0 U5 r1333591 SIP_LAYOUT SKILL Difference in behavior for padstack replace using axlPadstackReplace and command Replace Padstack$ o+ D8 Q5 {/ ?0 K
1333896 ASI_SI OTHER signoise -f and -k options don't work for net names with consecutive underscores.) E) ~# ?; f" k E g s
1333982 ALLEGRO_EDITOR ARTWORK ARTWORK: Coordinates of the hole get shifted by the "Draw holes only" option.
8 {9 O h0 _9 q: x1334302 CONSTRAINT_MGR SCHEM_FTB Import Logic - Import changes only or Overwrite current constraints fails to update signal models.
C- Q4 B9 R! ~7 Q% S- Y1335276 CONCEPT_HDL OTHER On selecting objects near the schematic page border, the border is also selected
7 C; D' k6 N- i1336322 CONCEPT_HDL CORE DE-HDL does not open with maximized window.* l; G1 G# i e' w9 D, w
1336783 PCB_LIBRARIAN IMPORT_EXPORT con2cap fails to export the part to OrCAD Capture format |
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发表于 2014-11-16 10:30
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发表于 2014-11-16 23:52
