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补丁包更新列表!- M. U" M G: F) L# B0 A
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DATE: 11-20-2015 HOTFIX VERSION: 061
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CCRID PRODUCT PRODUCTLEVEL2 TITLE: o4 q" }# M% Q% w+ v+ G
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1306441 APD OTHER The Minimum Shape Area option in Layer Compare uses an unspecified value% Q7 p3 t' m% B& G* E2 n% Z
1342644 ADW COMPONENT_BROWSE Need directive or method for Component Browser to load a search criteria file upon init+ u0 o1 x+ T! T$ L6 v
1413248 CONCEPT_HDL CORE Import from another TDO project makes the block read-only. d+ _$ U! Q c4 j
1417429 ALLEGRO_EDITOR INTERACTIV Pick box only accepts 1 set of values. You need to close the box and reopen it to draw a rectangle
- u5 y% g n N& V- H* K1417442 ALLEGRO_EDITOR INTERACTIV Spin via stack and only part of the stack spins
1 c9 v& \: b; F/ H1451977 CONCEPT_HDL PDF Origin of PDF mediabox not starting at (0,0) when PDF page_height and page_width are set) }8 A% h! ]2 d8 k% O) F
1453527 ALLEGRO_EDITOR EDIT_ETCH Contour route hugs the outer edge of the route keepin4 b" A% R: E$ ^# ], s' |- S
1464948 PCB_LIBRARIAN VERIFICATION The errors/warnings do not match between the various tools' k' ~0 z; j0 q6 E9 \' i! P% h7 z
1467826 CONCEPT_HDL PDF PublishPDF from Console Window creates a long PDF filename F" L8 u' F7 J. F% e0 j
1478639 CAPTURE OTHER Capture Browse Nets window does not display all nets9 V# p% I( @/ E* C. v, c3 x
1479177 SIP_LAYOUT OTHER Pin pair constraints do not appear to be supported in Sip Layout XL
, W3 K- }8 E' ~1479227 CONCEPT_HDL CHECKPLUS Custom DE-HDL Rules Checker rule flagging invalid voltage in hierarchy
* V' w: E2 a2 z4 _- g, M/ D( Q1479454 CONCEPT_HDL OTHER DE-HDL issue: locked DIFF_PAIR property is editable8 C5 U/ F8 |+ i9 ] B% d
1480293 CAPTURE PROJECT_MANAGER Capture hangs when searching for all nets# ]5 L! j. r4 p' c6 l
1483894 CONCEPT_HDL CORE Import Design hangs when pull-down arrow is clicked twice
5 }) W+ Q: d$ _. {1484781 CONCEPT_HDL CORE Three different Hierarchical Viewer issues# m# m9 c$ [# b1 @, X/ g+ C
1485059 PCB_LIBRARIAN CORE Part Developer pin attributes are randomly marked as read-only' A y7 i0 J% |$ y) N+ c* t5 ^
1485960 CONCEPT_HDL CHECKPLUS Custom DE-HDL Rules Checker rule is crashing the project+ P- z1 m4 W. ~" c
1486086 ALLEGRO_EDITOR ARTWORK Cannot generate artwork.5 n# s! \4 [5 U0 k6 `( b2 X
1486834 CONSTRAINT_MGR OTHER Restore the Status column in cmDiffUtility/ I! T8 v2 V9 U* }8 ]
1487085 CONCEPT_HDL CONSTRAINT_MGR Import Physical with the Constraints only option reports problems% ^0 Q3 @+ o2 g! s, x3 r9 y
1487197 ALLEGRO_EDITOR DRC_CONSTR Drill to Via DRCs are not being reported
, ~9 g; i5 ^8 e ^, x1487265 CONCEPT_HDL CORE Replace command in Windows mode shows incorrect behavior
. }. ]/ }9 t B1487733 CONSTRAINT_MGR OTHER Running Export Physical - It takes over two hours to update the PCB Editor board
. y1 [, C3 ?) o' V1488758 CONCEPT_HDL CONSTRAINT_MGR CM_VALIDATION_ON_SAVE should be a hard stop on Constraint Manager
) p, I3 d% s( c" N z4 T1490299 SCM OTHER ASA does not update revision properly
1 C- L9 U1 R: h: S* x3 i6 p1490744 ALLEGRO_EDITOR SKILL axlChangeLine2Cline changes line to cline and places it on the TOP layer
) t! I4 Q' Q' s) g9 e; d9 d1490924 F2B PACKAGERXL Save Design/Export Physical is resetting Via constraints
9 k1 ^2 Y' q, H5 @* F0 G1491351 ALLEGRO_EDITOR OTHER Create Detail for bond fingers on a custom layer not working
# c" e. q- X% J7 l1492595 ALLEGRO_EDITOR MANUFACT Dimension character substitution help is wrong: e5 _0 F! R+ n! R% \" X
1492777 ORBITIO ALLEGRO_SIP_IF OrbitIO import of customer mcm results in crash
& p. I) L2 n6 V1492901 CONCEPT_HDL CORE Cannot instantiate a multi-sections symbol (> 10 versions) in Design Entry HDL
* |5 z' Z3 D$ f# p; N0 ~1495621 ALLEGRO_EDITOR INTERFACES Oval pins are placed with wrong orientation in IPC2581
7 U/ K6 J4 q( S* p+ Y1497597 ALLEGRO_EDITOR DATABASE Show Element on pin shows wrong drill size' y! U4 s5 P: ~3 U% ]' e
1497956 CONCEPT_HDL CORE ADW Library Flow test schematic generation crashes DE-HDL while saving the design when using customer adw_conf_root
$ D6 S6 V1 J0 H { }" k' y1498234 ALLEGRO_EDITOR ARTWORK PCB Editor fails to create artwork and no error is listed in the log file
8 s: C6 Z0 c6 G/ K/ T: h* q1499363 CONCEPT_HDL CORE Custom attributes under variant management stopped working in Hotfix604 r' h. x9 o5 _; D$ O6 q9 ?
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6 ^5 `: |1 L5 E( [- D' a7 OSPB 16.6 UPDATED KITS RELEASE: ISR 16.60.061 EST.DATE: 11-20-2015
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CompBrowser16.60-s037wint
9 v) E% ~2 f2 u9 ?' @& tDSCoreUtils16.60-s077wint
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DSSchgen16.60-s030wint7 ~: X. s* P2 \/ M9 W1 {
DSSetup16.60-s010wint
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DSTextEditor16.60-s015wint6 I! l6 l% [4 b4 B5 _
DSUICommonIndep16.60-s019( l* V* d) J3 a6 A( H c3 I* I
DSUICommon16.60-s026wint
! \& [6 \% W! nDSUIUtils16.60-s037wint
8 K+ Z+ M3 s' `SPBIX06116.60-p002wint
4 `/ k# j+ W9 m: J" e$ madpPDFLibs16.60-s033wint
E0 ?0 l0 T& Y- \; R; t2 [: {* NadvanPakgDsnr16.60-s129wint
6 O! K* G; f) x- S- |% ^ }adwLRM16.60-s033wint; k& i) W0 m' z$ Y J4 \9 p
adwSDM16.60-s044wint
$ k% a5 ?1 { ]$ [; EalgroAcad16.60-s122wint
5 S, ? b) Z6 I! y4 halgroArtwork16.60-s122wint
# P; d9 f0 u% M# Y, YalgroAxl16.60-s0489 x8 g% K; M& B" l
algroBase16.60-s129wint9 p) u( x4 Q" U" x
algroCxt16.60-s077' u, @( R p, T
algroDBTools16.60-s124wint
. Y/ J; H+ b- @' _( s3 ZalgroDsign16.60-s122wint' e" j! @4 C( Z) q X
algroF2B16.60-s122wint& L' b/ ^- H, Q ^2 i! ?! K
algroIDF16.60-s122wint
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algroIpc16.60-s122wint2 }- |3 l+ i" N) `7 g6 d
algroMfg16.60-s122wint
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algroPlace16.60-s122wint% S. ?0 y, f" w8 z0 F+ C
algroSgnse16.60-s122wint5 E8 \0 s1 A% F9 r/ a; H+ p
algroSpif16.60-s122wint* t& V$ G' q7 {
algroStrm16.60-s122wint
4 m: m. @( i1 S3 ~. F0 t+ B: g0 ualgroTextIndep16.60-s089
3 C- l% n* O+ J+ G* y1 ^9 ialgroTransltr16.60-s121wint
+ ~. W# N5 g+ U8 YalgroUtlty16.60-s122wint, T( G$ W& ^3 M6 }' b2 ~
bom16.60-s030wint9 \2 n& E; Q+ ?$ x1 H1 r
capPSpLibMAB16.60-s018wint! p: J& A3 w" T! d' f. s9 K
capProg16.60-s044wint
# o8 I! C0 F$ l: l/ {checkplus_exp16.60-s023wint, c$ [* a; N$ K3 Y" L5 ^
conceptNT16.60-s106wint3 j" q' U* O2 p2 {/ T
concptSetup16.60-s015wint
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desSync16.60-s019wint
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5 t" J# w4 G0 x1 R# c$ gfetBase16.60-s034wint4 R) l# v1 t& L- s& X9 X2 o
icpCommon16.60-s122wint
6 Q; m" U( } piff2hdl16.60-s010wint
8 | D3 H" s5 p: c8 ^, ]lmancore16.60-s036wint# N' o h! a; D V: e
lmanext16.60-s012wint, g+ T- r: l9 v
lman16.60-s023wint
1 \' D a# L# SproductServer16.60-s084wint9 U2 e9 y+ o; R$ d1 U
projMgr16.60-s015wint2 c7 h7 p# T: _! r4 Z! R" b
pspProg16.60-s043wint
& i i8 [1 W" O, I. Arfpcbfe16.60-s026wint
& v, O4 m+ u9 x3 [3 B0 brfsipPcellIndep16.60-s005
8 E4 ~1 t' Z, S! @. |+ usipDsnr16.60-s128wint
: C8 s/ ?7 J" s) CspbFpgaPlanner16.60-s065wint
8 _: S+ c! w% `" Q7 r- o9 FspecctraQuest16.60-s122wint
a U; o) P5 S1 \9 LspgSignal16.60-s123wint
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6 |. E, B' n; C9 L. H C; K补丁包种子!
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cadence.spb.orcad.16.60.061.hotfix.rar
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