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偶也跟一贴！
8 b2 r- M- t; X以下内容来自《high speed digital system design》。: [4 r" V( b- q9 c' Q
! z: @4 `( j+ TA via is a small hole drilled through a PCB that is used to make connections between various
: a1 `" _, C; ?* i9 Players of the PCB or to connect components to traces. It consists of the barrel, the pad, and- d2 w9 x% X5 P/ }" u
the antipad. The barrel is a conductive material that fills the hole to allow an electrical3 Z, f6 |; ]' R
connection between layers, the pad is used to connect the barrel to the component or trace,1 B$ o# r2 Z$ B2 s: f
and the antipad is a clearance hole between the pad and the metal on a layer to which no+ u9 u$ p, O) t$ E* o' `
connection is required. The most common type of via is called a through-hole via because it
% L/ h/ ~- R# S0 [/ Sis made by drilling a hole through the board, filling it with solder, and making connections on
7 G6 G n4 D' M" ?1 B& Fappropriate layers via the pad. Other, less common types of vias, used primarily in multichip
9 e' q) d8 Z6 n- a6 S8 I% Vmodules (MCMs) and advanced PCBs, are blind, buried, and micro-vias. Figure 5.1 depicts `. l8 v1 r D' r$ w5 Y2 L- V5 @
a typical through-hole via and its equivalent circuit. Notice that the pads used to connect the" A. b; I5 q B" }3 M4 U
traces on layers 1 and 2 make contact with the barrel and that there is no connection on2 l s+ L! I3 l8 r; L2 V
layer 3. Blind and buried vias have a slightly different construction. Since through-hole vias
+ m4 C U9 e& I |, Z7 p Care by far the most common used in industry, they are the focus of this discussion.
2 {+ g$ V/ ^7 i2 g
- h- z8 U" C6 x' S) ANotice that the via model is simply a pi network. The capacitors represent the via pad
" T v6 [* H% q3 I! v! K; ccapacitance on layers 1 and 2. The series inductance represents the barrel. Since the via
3 C% N3 K3 G$ V2 m1 astructures are so small, they can be modeled as lumped elements. This assumption, of5 T2 R2 J, C4 u$ k
course, will break down when the delay of the via is larger than one-tenth of the edge rate.3 P1 a+ s7 K+ W: A" q% N
The main effect that via capacitance has on a signal is that it will slow down the signal edge$ E% N3 R E3 Q( b3 l
rate, especially after several transitions. The amount that the signal edge rate will be slowed3 X4 m5 g- L: V! @
can be estimated by examining the degradation of a signal transmitted through a capacitive! B" d2 b8 j: t1 X
load, as shown later in this chapter in equation (5.21). Furthermore, if several consecutive
% v6 M3 e. F: y6 Fvias are placed in close proximity to one another, it will lower the effective characteristic
) _ {4 w$ ]! z2 r5 p! |7 uimpedance, as explained in Section 5.3.3. The approximate value of the pad capacitance is
$ @" H$ j4 O* z' [4 q! B[Johnson and Graham, 1993]
7 D: C l4 W. w- r1 ]0 X* v+ t) ?$ J& ~- l1 Y. r0 ]. x4 c0 a
[ 本帖最后由 killerljj 于 2007-11-21 20:51 编辑 ] |
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发表于 2007-9-11 14:20
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反对！
发表于 2007-9-15 15:34
俺也顶一下,因为焊盘描述的太形象啦!
发表于 2007-12-19 08:39