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偶也跟一贴！
4 q, G: V( ^+ K' j" }) q5 m' p) k4 J* e) H以下内容来自《high speed digital system design》。% x$ ~# ?, S C9 a+ f. y& [
_& b: |+ h+ k0 u: l
A via is a small hole drilled through a PCB that is used to make connections between various
+ g- E5 q+ ?, J* H0 }layers of the PCB or to connect components to traces. It consists of the barrel, the pad, and3 u5 d9 C( R9 ~, R$ f( k/ d" i
the antipad. The barrel is a conductive material that fills the hole to allow an electrical4 Y* q' l& e0 q) h9 r
connection between layers, the pad is used to connect the barrel to the component or trace,1 B8 C7 m9 q+ t
and the antipad is a clearance hole between the pad and the metal on a layer to which no. K( g; r1 K/ x& v) l' ^& z
connection is required. The most common type of via is called a through-hole via because it3 ^+ V5 u! d" k: u2 C; G
is made by drilling a hole through the board, filling it with solder, and making connections on
4 y& X, V8 {- v; z" Yappropriate layers via the pad. Other, less common types of vias, used primarily in multichip
7 O, H+ O1 ]( s6 l% Ymodules (MCMs) and advanced PCBs, are blind, buried, and micro-vias. Figure 5.1 depicts
. n Q0 @; E0 a0 W# f! oa typical through-hole via and its equivalent circuit. Notice that the pads used to connect the
& E/ P: C y( Z5 t" i6 h N2 Utraces on layers 1 and 2 make contact with the barrel and that there is no connection on, f) r8 k) n& [/ w2 k
layer 3. Blind and buried vias have a slightly different construction. Since through-hole vias
% [# |- ^ h; [' n5 A- eare by far the most common used in industry, they are the focus of this discussion.
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Notice that the via model is simply a pi network. The capacitors represent the via pad
0 `: T* g% R, ?& G9 Z& m! G, C4 kcapacitance on layers 1 and 2. The series inductance represents the barrel. Since the via
6 N: n8 |$ m: S& y$ lstructures are so small, they can be modeled as lumped elements. This assumption, of
. a$ c: a. j1 P7 U) H2 S' o, icourse, will break down when the delay of the via is larger than one-tenth of the edge rate.
+ T; }! Z! ]1 v% X) y6 U" R: r2 ~& J& lThe main effect that via capacitance has on a signal is that it will slow down the signal edge
: [' J7 g9 ^1 R* x! g, i7 Grate, especially after several transitions. The amount that the signal edge rate will be slowed' C0 c! g, ?4 e* _) F
can be estimated by examining the degradation of a signal transmitted through a capacitive
) B1 b4 k( }) e* {: e+ Q. K! wload, as shown later in this chapter in equation (5.21). Furthermore, if several consecutive
( M" f' h& U; S8 u1 l" O9 I: q; Evias are placed in close proximity to one another, it will lower the effective characteristic0 C$ t6 c) Q; y
impedance, as explained in Section 5.3.3. The approximate value of the pad capacitance is
" E& K! W, d' |- t' B[Johnson and Graham, 1993]
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( J1 F: l0 b" o[ 本帖最后由 killerljj 于 2007-11-21 20:51 编辑 ] |
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发表于 2007-9-11 14:20
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反对！
发表于 2007-9-15 15:34
俺也顶一下,因为焊盘描述的太形象啦!
发表于 2007-12-19 08:39