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偶也跟一贴！+ a" e5 A2 y Y
以下内容来自《high speed digital system design》。5 G) G% y; a% g3 W
" O5 D2 x( ^! ?: qA via is a small hole drilled through a PCB that is used to make connections between various
$ M- [' v" t/ H4 W% T* |layers of the PCB or to connect components to traces. It consists of the barrel, the pad, and
, v5 c' s% l1 w+ n. \, Vthe antipad. The barrel is a conductive material that fills the hole to allow an electrical
9 P2 G6 ~% {2 S" @3 p$ N: |connection between layers, the pad is used to connect the barrel to the component or trace,5 O% _: i0 o+ J- m' x/ h
and the antipad is a clearance hole between the pad and the metal on a layer to which no+ R" ^! V7 ^' A0 L2 h+ |' M
connection is required. The most common type of via is called a through-hole via because it
- d) u( h9 {+ F# _ z9 ]3 C- jis made by drilling a hole through the board, filling it with solder, and making connections on& n6 j$ s4 M* `2 @ T# V; l
appropriate layers via the pad. Other, less common types of vias, used primarily in multichip3 q0 v( O+ h% ]! t
modules (MCMs) and advanced PCBs, are blind, buried, and micro-vias. Figure 5.1 depicts: y' h) R* U5 @
a typical through-hole via and its equivalent circuit. Notice that the pads used to connect the
8 n1 ]- B4 V3 m& N- U: mtraces on layers 1 and 2 make contact with the barrel and that there is no connection on
$ {! r' K4 ^, R7 j J3 ylayer 3. Blind and buried vias have a slightly different construction. Since through-hole vias0 H4 B1 ?2 g( j: T. K
are by far the most common used in industry, they are the focus of this discussion.
: B$ J5 p% [) X* w4 Z- _2 z
- F0 S' K; E! u$ JNotice that the via model is simply a pi network. The capacitors represent the via pad- A. ]0 W- `* v( X2 ^0 `
capacitance on layers 1 and 2. The series inductance represents the barrel. Since the via
/ M8 Z7 o O/ Qstructures are so small, they can be modeled as lumped elements. This assumption, of
1 X, W) n' H9 I2 b$ mcourse, will break down when the delay of the via is larger than one-tenth of the edge rate.
/ B- T1 y; v( c( G8 ]- MThe main effect that via capacitance has on a signal is that it will slow down the signal edge
5 i0 R+ J2 W; T* t9 m9 Y; h; [rate, especially after several transitions. The amount that the signal edge rate will be slowed
; h- O2 R8 w; I, U% O# s3 @& s( d* _# bcan be estimated by examining the degradation of a signal transmitted through a capacitive! l2 C: u3 j1 K1 W, y- C
load, as shown later in this chapter in equation (5.21). Furthermore, if several consecutive
7 [. A+ o$ N3 l) v! Pvias are placed in close proximity to one another, it will lower the effective characteristic8 G- Q4 ]! l' D0 A7 i h8 g4 ?) J" l
impedance, as explained in Section 5.3.3. The approximate value of the pad capacitance is) `, W/ @+ P/ @& D* ^
[Johnson and Graham, 1993]
, b8 P+ R: Y9 }, c7 N6 \$ ~" K9 ^! \! [. |" M( t2 T
[ 本帖最后由 killerljj 于 2007-11-21 20:51 编辑 ] |
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发表于 2007-9-11 14:20
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发表于 2007-9-15 15:34
俺也顶一下,因为焊盘描述的太形象啦!
发表于 2007-12-19 08:39
