错误如下' R/ D$ \) N" J# b* v# J* \! I
ERRORack:679 - Unable to obey design constraints (LOC=CLB_R38C1.S0) which ' H( @/ D @+ r0 p, e) z require the combination of the following symbols into a single SLICE 8 T' h. b6 A1 t component:) C: t: Z/ v' H; ~+ o |4 e+ ^
FLOP symbol "Chain[37].uChain/Node[0].uNode0/uFdce" (Output Signal = 6 m, O- h; o! {# e# Y( t9 o1 h Chain[37].uChain/wOutA0<0>) " Z2 \; ~- d; a( x FLOP symbol "Chain[37].uChain/Node[0].uNode1/uFdce" (Output Signal = 5 L B& W/ j- y/ `1 h9 ~6 u Chain[37].uChain/wOutA1<0>)& z; K: L3 j4 U) c L
The set/reset signal Reset_IBUF_1 of register; D9 Q: e X* {9 X1 Q- ?; B
Chain[37].uChain/Node[0].uNode1/uFdce doesn't match the existing usage of the ; D) M1 w; h# O. J SR MUX. The signal Reset_IBUF_2 already uses SR. Please correct the design5 d. c3 E8 _3 [" w0 j
constraints accordingly. 3 P1 H& J0 f7 T* ^% l. n( h请大侠帮忙
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发表于 2012-6-8 17:35
ack:679 - Unable to obey design constraints (LOC=CLB_R38C1.S0) which
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