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本帖最后由 超級狗 于 2018-4-19 16:12 编辑 ) u. n% J6 `% L( K) L0 l O2 R6 a
2 ?% U2 P! h) w, F' Y你有打開 Si5344 的 Zero Delay Mode 嗎?這個應該有助於縮小相位差(Phase Deviation)。: u) | C) @8 z, E
4 f, W# z& ] q- x" s3.9.13 Zero Delay Mode
# z+ t& S3 l+ ]+ ?A zero delay mode is available for applications that require fixed and consistent minimum delay between the selected input and outputs. The zero delay mode is configured by opening the internal feedback loop through software configuration and closing the loop externally as shown in the figure below. This helps to cancel out the internal delay introduced by the dividers, the crosspoint, the input, and the output drivers. Any one of the outputs can be fed back to the FB_IN pins, although using the output driver that achieves the shortest trace length will help to minimize the input-to-output delay. The OUT9 and FB_IN pins are recommended for the external feedback connection. The FB_IN input pins must be terminated and ac-coupled when zero delay mode is used. A differential external feedback path connection is necessary for best performance. Note that the hitless switching feature is not available when zero delay mode is enabled.: f/ B8 Q, h- S& X; }
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