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F282xx/F283xx自身带有I2C模块，但受限于TI的官方例程中使用了fifo,其深度为4，在写EEPROM时，读写地址16位，占了2个字节，最多只留下2个字节存储数据，使用很不方便、实用性也极差。有不少网友在这一块碰壁，甚至逼的没办法使用IO口模拟I2C，放弃使用I2C模块。最近一直在测试28027的I2C模块有所获，可突破发送/接收长度限制（非fifo模式，当然这个长度也要和I2C器件匹）。本查介绍查询方式下的I2C模块使。
# g! I( _' { y& Q2 ~" U K- K. k1、宏定义I2C模块操作参数
0 t8 ]( g& e+ a! P3 N: s: G t#define I2C_SLAVE_ADDR 0x50 //器件地址不含读写位。以24Cxx系列为例，器件地址应为：(0xA0>>1)，即0x501 V' z" K8 s5 l& V P7 _* X" u, Q
#define I2C_NUMBYTES 10 //发送/接收数据长度
$ \. r% e- ~) a3 Q+ Y U6 h#define I2C_EEPROM_HIGH_ADDR 0x00, n4 e3 M+ J8 d) ]: J
#define I2C_EEPROM_LOW_ADDR 0x00
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2、设置相应GPIO引脚用作I2C引脚。 修改F2802x_I2C.c文件中的void InitI2CGpio()函数。' R. v; t: q8 G+ Z" A
3、初始化I2C模块。
) V: i- M& D E0 w) E& qvoid I2CA_Init(void)* a- B. o `6 r G
{
9 a7 |9 I* c0 Z+ Q( c* ~" j // Initialize I2C
: t" n3 c# e% S8 R7 K I2caRegs.I2CSAR = 0x0050; // Slave address - EEPROM control code/ m; e0 c/ o+ [* R
+ Y8 p# Q( |% n0 N) n
// I2CCLK = SYSCLK/(I2CPSC+1)
% u- d- e$ V) E% d #if (CPU_FRQ_40MHZ||CPU_FRQ_50MHZ)
* n1 @ ^& y4 ` |, M/ k! E I2caRegs.I2CPSC.all = 4; // Prescaler - need 7-12 Mhz on module clk
2 M6 o/ k/ v3 J; H; s #endif5 X v" A/ i, _
2 ]9 C! W2 `7 G* ]+ G4 H #if (CPU_FRQ_60MHZ)+ o6 D3 [# c: O
I2caRegs.I2CPSC.all = 6; // Prescaler - need 7-12 Mhz on module clk- H0 l. `/ m. Y' t" @
#endif' x8 ?! T/ j& ]
I2caRegs.I2CCLKL = 10; // NOTE: must be non zero4 Z1 I5 z8 @: Q$ ]
I2caRegs.I2CCLKH = 5; // NOTE: must be non zero' g$ I8 z1 |% {
I2caRegs.I2CIER.all = 0x00; // Enable SCD & ARDY interrupts
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I2caRegs.I2CMDR.all = 0x0020; // Take I2C out of reset
8 d |+ P; o7 r) F. ], D: r // Stop I2C when suspended
5 i% w. p v r: _9 U9 d# \
8 T- s J# I! C3 ^ I2caRegs.I2CFFTX.all = 0x0000; // Enable FIFO mode and TXFIFO w4 q- S- d1 B4 u8 @, p
I2caRegs.I2CFFRX.all = 0x0000; // Enable RXFIFO, clear RXFFINT," Q7 g( ]2 f$ M3 c* P2 j+ Z
1 k; `/ Z4 W! e1 I% l" n/ a$ c( X% u, _
return;& N" c4 K: o( G
}7 S% K5 B, I( U7 x
4、执行I2C模块接收或者发送。
+ K& c! l, {! Q2 _7 X//I2C模块发送数据到I2C器件。
! r* a4 c [ W$ a% y$ Uvoid I2CA_SendData(void)
0 C; t' F+ ^+ j. P( ]9 h{
6 w2 z" ?9 p+ B( z Uint16 i;
6 n1 W9 l! z2 a& O3 h w9 x# b I2caRegs.I2CSAR = I2C_SLAVE_ADDR; //Set slave address9 M O1 J$ @% g5 h
I2caRegs.I2CCNT = I2C_NUMBYTES + 2; //Set count to 5 characters plus 2 address bytes
+ o/ n$ m( q2 `, g2 j$ S I2caRegs.I2CDXR = I2C_EEPROM_HIGH_ADDR; //Send eeprom high address8 [, j3 y' Q; E3 k; {, r, K
I2caRegs.I2CMDR.bit.TRX = 1; //Set to Transmit mode
1 B/ d9 s: F& R# M, W I2caRegs.I2CMDR.bit.MST = 1; //Set to Master mode* S; h9 b8 ~ n2 H' v. Z+ F8 v
I2caRegs.I2CMDR.bit.FREE = 1; //Run in FREE mode
! Z5 ]- b* _( p I2caRegs.I2CMDR.bit.STP = 1; //Stop when internal counter becomes 0
}0 Z2 c! }( T& @: x I2caRegs.I2CMDR.bit.STT = 1; //Send the start bit, transmission will follow
J1 e8 f+ C- U8 t2 C- p o while(I2caRegs.I2CSTR.bit.XRDY == 0){}; //Do nothing till data is shifted out2 K& A2 k" j6 A
I2caRegs.I2CDXR = I2C_EEPROM_LOW_ADDR; //Send eeprom low address
) |0 A6 x% V6 B [3 ?/ q# I4 k5 Z3 k+ E: f
for(i = 0; i < I2C_NUMBYTES; i++){
# a# C5 V* L* U. q while(I2caRegs.I2CSTR.bit.XRDY == 0){}; //Do nothing till data is shifted out
2 N: F) Y; |) D8 h3 I- @2 }5 r I2caRegs.I2CDXR = TxdData; //Send out the message& p' b1 h3 U/ i' t% ~; g- v8 v
}3 e& @$ ?& j$ b/ H i" `8 x
}
% z$ G" h7 r8 Z//I2C模块从I2C器件接收数据。
t+ d- X" q: r Pvoid I2CA_ReceiveData(void)1 r6 G/ Q) T) k4 T' l
{' {3 M2 \; Y% C9 o. T% p
Uint16 i;8 [: n, c& M! l8 _% {7 }
I2caRegs.I2CSAR = I2C_SLAVE_ADDR; //Set slave address& h8 s) e8 z' d! v% n; U
I2caRegs.I2CCNT = 2; //Set count to 2 address bytes3 D: G- z- A1 d0 E$ x/ \, Q1 x
I2caRegs.I2CDXR = I2C_EEPROM_HIGH_ADDR; //Send eeprom high address
; R5 f& E' B9 @" H* }/ h/ | I2caRegs.I2CMDR.bit.TRX = 1; //Set to Transmit mode( H* I0 A8 Y+ g& t" @" l$ X
I2caRegs.I2CMDR.bit.MST = 1; //Set to Master mode
4 ?5 s# e+ U0 m. }( V, @7 h I2caRegs.I2CMDR.bit.FREE = 1; //Run in FREE mode. u: w. h) O/ N8 o, z4 Q4 _1 Y
I2caRegs.I2CMDR.bit.STP = 0; //Dont release the bus after Tx
- o* r3 \- I( z. n" H I2caRegs.I2CMDR.bit.STT = 1; //Send the start bit, transmission will follow; f" f; o5 e# p- [. y# E) n
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while(I2caRegs.I2CSTR.bit.XRDY == 0){}; //Do nothing till data is shifted out
2 S7 q2 K( n, T I2caRegs.I2CDXR = I2C_EEPROM_LOW_ADDR; //Send eeprom low address) o2 m7 T) |, o6 J* U
I2caRegs.I2CCNT = I2C_NUMBYTES; //read 5 bytes from eeprom
, _& E x ?( T' E. s5 _, I, B I2caRegs.I2CMDR.bit.TRX = 0; //Set to Recieve mode
. q* H. V9 u9 \3 a) N, t: P I2caRegs.I2CMDR.bit.MST = 1; //Set to Master mode
% r# z4 k4 J8 Y$ Z/ K e _ I2caRegs.I2CMDR.bit.FREE = 1; //Run in FREE mode
) `* Y* p( u# O$ u X( f6 d I2caRegs.I2CMDR.bit.STP = 1; //Stop when internal counter becomes 07 v8 [' W, I: _ u
I2caRegs.I2CMDR.bit.STT = 1; //Repeated start, Reception will follow
& C9 W& p+ c, c0 h for(i = 0; i < I2C_NUMBYTES; i++){
. Y/ l& A; g- @; ^ while(I2caRegs.I2CSTR.bit.RRDY == 0){}; //I2CDRR not ready to read?
2 K; T" l- P5 o* z RxdData = I2caRegs.I2CDRR;+ J4 B& ^8 h/ _! [( Q; u
}
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发表于 2016-6-28 15:05
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