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ISIM仿真内容如下，提示错误：[USF-XSim 62] 'compile' step failed with error(s)while executing 'F:/Camera_HDMI/Vivado/SCCB/SCCB.sim/sim_1/behav/compile.bat'script. Please check that the file has the correct 'read/write/execute'permissions and the Tcl console output for any other possible errors orwarnings.
* ?+ | L. _9 ` T. G: f7 r把实例化sccb_ip去掉就好了，但不知道为什么! m% R. D: ~3 s2 \, Y0 C1 O
module sccb_sim( ); reg [15:0] sub_addr; reg [7:0] data_from_cpu; // reg rd_wr,sio_en,sio_c,sio_d; wire [7:0] data_from_slave; initial begin sub_addr[15:0] <= 2'b01_1000; data_from_cpu[7:0] <= 8'd101; rd_wr <= 0; #10000 $finish; end reg clk = 0; always #10 clk <= ~clk; sccb_ip sccb_ip( .clk(clk), .sub_addr(sub_addr), .data_from_cpu(data_from_cpu), // .rd_wr(rd_wr), // .sio_en(sio_en), // .sio_d(sio_d), .sio_c(sio_c), .data_from_slave(data_from_slave) // ); endmodule 源码如下，综合已经通过 module sccb_sim( ); reg [15:0] sub_addr; reg [7:0] data_from_cpu; // reg rd_wr,sio_en,sio_c,sio_d; wire [7:0] data_from_slave; initial begin sub_addr[15:0] <= 2'b01_1000; data_from_cpu[7:0] <= 8'd101; rd_wr <= 0; #10000 $finish; end reg clk = 0; always #10 clk <= ~clk; sccb_ip sccb_ip( .clk(clk), .sub_addr(sub_addr), .data_from_cpu(data_from_cpu), // .rd_wr(rd_wr), // .sio_en(sio_en), // .sio_d(sio_d), .sio_c(sio_c), .data_from_slave(data_from_slave) // ); / L0 l9 _. ?) i/ E- r; h5 D0 \
endmodule 4 {/ k, Z w, Q, i5 M7 \
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发表于 2016-5-20 10:43
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