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Cadence SPB16.6已经推出，需要的朋友可以点击下面的链接下载： ^% b2 P9 p4 [, S; _ n0 m$ N
dl.vmall.com/c0pxuzug1s# i& Y' o% W. G+ W# |
里面有补丁Hotfix_SPB16.60.001_wint_1of1.exe' {* q7 \- D. k4 J3 Y/ `
5 m# D5 u I, d) ^, j SDATE: 03-7-2013 HOTFIX VERSION: 005
/ |0 h% V2 y6 y) o* M===================================================================================================================================
) k) H; p+ V; [7 BCCRID PRODUCT PRODUCTLEVEL2 TITLE
- x$ |, j/ }7 \9 C2 ^===================================================================================================================================
7 X% B# Y7 r& t% @7 l- Q1067770 IXCOM-COMPILE COVERAGE Assertion failed: file ../covToggleCoverageXform.cpp, line 1102" O* n( D" ]0 F# c% D7 P
1100442 ALLEGRO_EDITOR PLACEMENT Placement queue shows components whichs are already placed; n- s8 G3 s1 [$ n! r4 x
1101555 ALLEGRO_EDITOR DATABASE Allegro Crash frequently
V D5 O1 y( o% @& D1104011 ALLEGRO_EDITOR DATABASE Place replicate move group of a modules leaves traces behind2 g+ ~% k d% ]+ H& g1 U; ?
1104065 SCM NETLISTER SCM 16.6 has problem generating Verilog with existing sym_1 view1 ~. f$ u- w$ n w, V; V$ O
1104605 F2B PACKAGERXL Pins of function swapped part in block not displayed8 H: `4 f* n9 N8 P% m9 o( t
1104790 SCM IMPORTS Corrupt data once SiP file is imported into SCM
/ [% c! P: S2 }% t5 u- l1105066 APD IMPORT_DATA Import NA2 worked in 16.5 "035" but fails in 037 and 16.63 D3 e2 G) A7 m; d, Y( T
1106323 ALLEGRO_EDITOR PLACEMENT Unable to locate specific placed symbol on this board as it becomes invisible after placement.
% K0 ]( B4 r$ C% o# J: [4 Q- s1108032 CONCEPT_HDL CORE 'Find' option does not list all Components in the Design! f* U' }( k h3 w8 Z6 J6 Q9 h
1109080 ALLEGRO_EDITOR OTHER Window DRC is not working in OrCAD PCB Editor Professional |
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发表于 2013-3-15 15:12
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支持！
反对！
发表于 2013-6-29 13:29