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获奖论文在各公司的分布情况
本帖最后由 stupid 于 2013-2-16 14:49 编辑 , n3 X! p5 S% o& s( P2 w
# j: N* T4 Y$ y" c& N+ p) O1. A reusable generic platform for validation and characterization of high speed mixed signal designs# I$ a6 X" \" I/ U8 w% Y! R
& ~) L; b$ a+ A0 ARambus 出品。+ [1 W2 J( S% N/ b; ^
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2. A rapid prototyping of FPGA-Based duobinary transmitter/receiver for high speed electrical backplane transmission
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宾大和Agilent联手，Agilent方面是Mike Resso., L( W2 n& d( Q9 E
+ q# A; V! \+ M- O/ I+ H3. channel to channel crosstalk behavior and design optimization for ddr4 memory buses
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Intel，Xiang Li，DDR4连接器规范的制定者。; F- z. Q0 E! g# T, v
) d; n l0 J2 O2 A5 Y7 d7 O4. signal and power integrity(SPI) co-analysis for high speed communication channels
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IBM美德研发中心联手。. A! b/ D1 f+ k+ q& T/ T7 Z' [8 S2 R
! q- _) n& I* T5. innovative PDN design guidelines for practical high-layer-count pcbs5 i( v9 q; K0 [5 a' h: C
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作者主要来自密苏里理工，其中Siming Pan 和Jun Fan都来自清华，后都就读于密苏里，俩人貌似有师生之谊。
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6. Time domain and statistical model development,correlation,and analysis methods for high speed SerDes 2 p5 q. g, b( X
4 l. O) D/ x2 d9 c6 ?$ l; X9 uLSI和Agilent联合，Agilent是Fangyi Rao。. W9 G, C! P2 d8 A( `
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7. applying microwave techiques to digital systems: a simple case study
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Cray、SiSoft联合出品。3 h- I! M2 g5 x& }/ F# O* m$ ^7 w
3 I5 x5 `1 d# q8. high throughput,hign-sensitivity measurement of power supply-induced bounded,uncorrelated jitter in time,frequency,and statistical domains
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Altera出品，3个作者都是亚裔，其中大家熟悉的Daniel Chow，以及一位疑似华人Shishuang Sun。5 y/ {% U' e( [, Z' K
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9. beyond 25Gbps:a study of NRZ and multi-level modulation in alternative backplane architectures
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* Z$ \+ f( _, vLSI、TE联合出品& y- H F( F( U3 z+ w7 |% M
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10. Memory interface on-chip PDN noise Charachterization,modeling and its impact on timing
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Altera出品，9位作者。
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11. Enabling DFT logic and timing verification in mixed signal designs# Y" ~- O, B% U ]( S$ v6 }
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Rambus和Synopsys联合出品。
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12. analytic solutions for periodically loaded transmission line modeling/ P1 ^# L r* M; v/ U
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Intel 和 Ansys 联合出品。5 K/ t$ K2 |% J
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13. power-signal co-integrity design for multi-Gbps low-power DDR3 mobile platforms. {0 k0 C; v% n7 A$ X
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Samsung出品，目前似乎还没有用LPDDR3的手机，但是毫无疑问，这将会很快成为智能手机的标配。
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F: T, M' T" L: A14. power/Ground bump optimization technique on early design stage
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Smasung出品。
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2 A5 ^6 E' n/ R0 {1 |15. DDR memory channel design from passive stub eqalizer perspective
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Intel，貌似1位华人 Qin Li。: l1 p s- N. Y( ~# A
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16. using power aware IBIS v5.0 behavioral IO models to simulate simultaneous Switching Noise
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Xilinx 和 Cadence出品，非常有用的SSN仿真文章。
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17. validating EMC simulation by measurement in reverberation chamber
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来自Cisco，作者中有4位华人，3位来自思科中国研发中心，分别是Xiaoxia Zhou，Hongmei Fan，Jinghan Yu
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18. 3D interposer design and electrical performance study
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Rambus 联合出品。
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: Z. H% e6 Y7 \6 v" W& H i19. Dramatic noise reduction using guard traces with optimized shorting vias
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Eric Bogatin和Lambert Simonovich联手
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20. effects of ground via asymmetry on mode conversion for high speed differential signals
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IBM独家出品。* h" R& ~, Y+ h5 l) h: v! Z
# T- Z/ r: p' y& `/ `0 E, {21. design and analysis of a high-speed parallel interface for 16Gbps coded differential signaling z: F1 w8 s0 l+ j1 x. u; t8 T
, H/ h2 d( h/ DRambus、Samsung联合出品。
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) t9 u5 |* B# }2 i+ d7 A, y22. measurement-based simulation:increasing IBIS-AMI model Accuracy with Data from lab measurements3 ]4 e1 O" @" t& P: {
% R s2 i) A# T6 \/ j, mSiSoft、Ericsson联合出品。3 ~) w3 i$ W3 W' n/ X0 `
6 J- c/ Q, G ^, }23. accurate receiver clock positioning in high speed parallel buses
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Rambus、Altera、xilinx、Qualcomm 联合出品。, }+ Q- U: ~! c# t; H
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24. partial response and noise predictive maximum likelihood(PRML/NPML) Equalization and Detection for high speed serial link systems9 e3 |5 V' r4 _$ K) n' I! q
5 {4 B" J7 j# S: I) ALSI出品，3作者中有一个中国人，Cathy Ye Liu，1995年清华毕业，后去了美国。
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25. Which one is better?comparing options to describe frequency dependent losses7 {( ~$ H0 I# y1 G" y# l9 ^
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Eric Bogatin联合CCN，Simberian出品。
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26. a reverse nyquist approach to understanding the importance of low frequency information in scattering matrices
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Ansys出品
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27. Terabit/s packaging design for testing of high speed IC transceivers
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出自鼎鼎大名的IBM T.J.Watson Research Center，Xiaoxiong Gu是众多作者中的一位。
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28. Channel operating margin(COM):evolution of channel specification for 25Gbps and beyond
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Intel、Altera联合出品，Mike Peng Li出手啦。- n, n" G7 v* s
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从今年DesignCon的获奖论文看，Rambus依然是论文大户，共有5片论文获奖，其中4篇是和别人合作。Intel 4篇，2篇与人合作。Altera 4篇。IBM独自贡献了3篇。 Samsung 3篇，一篇和Rambus联合，跟最近整个三爽的势头一样，表现的很猛。LSI 3篇。Agilent、xilinx、Sisoft都是2篇。多产的Bogatin博士，也是2篇。仿真大户Ansys这次只收获了1篇。 整机厂商，如Cisco、Cray、Ericsson则均收获了一篇。, ?1 `3 }& k2 p6 p2 B, z
{: J5 d6 T: v& `密苏里理工表现优秀，乔治亚理工则没有收获。+ L; f9 K9 h) z! J: Z( n
% Y- v2 j4 W2 r/ L国内SI的领头羊，华为亦有论文宣讲，但未中奖。另外Qualcomm的有线部门开始发力，他们目前的重心应该在10G 以太网上。8 q0 e+ z' {- B; {! z* D+ k/ p
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另外，几乎每篇获奖论文的作者都有一个华裔，从侧面反映出来中国人苦逼，到哪儿都是做民工的命，呵呵……- _5 u7 s j) T% l P2 _* i# A" ~
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发表于 2013-1-25 04:47
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发表于 2013-1-30 00:44
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