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基于Xilinx28nmFPGA，结合Vivado，讲解数字信号处理中经典算法在FPGA上的实现，新增算法的MATLAB代码描述。清华大学孟宪元教授、Xilinx张宁联合力荐。+ F7 `0 ?5 z* }' N7 E/ ?! u2 @
/ u/ d% R! W2 O编辑推荐：
A& ^- A: P! {1 J+ l# @在这本书中，作者不仅介绍了器件底层硬件结构的特点及软件开发工具的使用技巧，也花了大量篇幅介绍如何有效地利用FPGA来实现常用的一些数字信号处理运算功能，同时，本书中所提供的大量范例及一些实用技巧相信也会给读者带来很多直接的帮助。
4 r& z1 Z) ` O% R& [4 @全书简要介绍了最新的Xilinx 7系列FPGA架构、Vivado最新设计工具的开发流程以及新的集成逻辑分析仪（ILA）和虚拟输入/输出（VIO）调试工具，分析了数字信号处理系统的架构、性能和数据格式等。在此基础上深入分析了基于FPGA实现各种数字信号处理算法的工程实例，包括基本的加减乘除、累加、开方和CORDIC等DSP算法， 以及经典的FIR滤波器、数字频率合成器、多相滤波器、CIC滤波器和基2/基4 FFT等DSP算法，作者对算法作了详尽的理论分析，给出映射到FPGA 架构的设计方案以及对应到SysGen的设计模型或Matlab程序代码。对于读者，无论是利用Matlab和Simulink的基于模型的设计方法获得网表文件，或者利用IP库中的DSP核进行参数设置，这些内容都是进行DSP系统设计详尽的设计指导和参考，进一步可以方便地完成FPGA的硬件实现。
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本书围绕Xilinx新一代28nm工艺芯片7系列FPGA，结合Xilinx新一代开发工具Vivado以及针对算法开发的Vivado HLS和System Generator，讲解了数字信号处理中的经典算法在FPGA上的实现方法。这些算法既包括常规的加减乘除、累加、开方和CORDIC算法，也包括经典的FIR滤波器、数字频率合成器、用于多速率信号处理的多相滤波器、级联积分梳状（CIC）滤波器、半带滤波器以及基2和基4快速傅里叶变换（FFT）处理器所涉及的相关算法。与第1版相比，第2版保持了第1版的主题——如何将理论算法转化为工程实现，同时为了突出这个主题，新增了算法的Matlab代码描述，以帮助读者理解这一转化过程；此外，还增加了部分算法的System Generator模型，进一步帮助读者深入理解并借鉴。在此基础上，本书还讲解了FPGA实现时的一些细节问题如复位、跨时钟域设计等，这部分内容也体现了Xilinx提出的UltraFast设计方法学所倡导的设计理念。总之，本书既有宏观算法的理论描述，又有微观算法的具体工程实现。6 Y( S7 Q- J, U. s
- Z8 H* x ~; z& {; K9 F作者简介：0 F( Y* {1 r f2 e Q8 S0 i5 Z
高亚军，2004年毕业于北京理工大学电子工程系信息与信号处理专业，获工学学士学位；2007年毕业于中国兵器工业集团第206研究所电路与系统专业，获工学硕士学位。研究生毕业论文《基于FPGA的数字波束形成》荣获2007年兵器科学院优秀论文。一直从事雷达信号处理的相关科研工作。2010年加盟科通集团，从事赛灵思（Xilinx）FPGA技术支持，数字信号处理技术专家。* J7 d8 z" y" s# W+ @ W( ^# `
3 s4 ?1 ~# J* k- @% ?, z名人推荐：
- M: }0 t' S; I3 B( P& T高亚军编写的《基于FPGA的数字信号处理》（第2版）一书在第1版的基础上增加了许多内容，充实了更多的设计范例。
+ U3 I+ w5 S3 p+ y4 y% Y# j——清华大学教授 孟宪元
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. K' t* c4 t8 k4 ~不同于通用的DSP处理器结构，FPGA内部集成了丰富的DSP功能单元以实现高速并行运算，而作为一名FPGA的设计人员，如何充分利用这些DSP功能单元就成为实现最终性能的关键所在。高亚军先生的这本书就完美地解决了这一问题，他利用其个人多年从事FPGA设计研发、技术支持的宝贵经验，将一些看似复杂的问题深入浅出地表述出来。 }3 h6 O) j0 J2 D8 y( \
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——赛灵思电子科技（上海）有限公司亚太区应用拓展经理 张 宁
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( A ?8 y9 @6 Y$ q目录： 第1章 现场可编程门阵列技术分析·············································· 1 1.1 FPGA内部结构分析············································································ 1 1.1.1 FPGA在大规模集成电路中的定位·································· 1 1.1.2 传统的FPGA内部结构分析············································ 2 1.1.3 SoC FPGA内部结构分析·················································· 7 1.2 FPGA设计流程分析············································································ 9 1.2.1 传统的FPGA设计流程···················································· 9 1.2.2 SoC FPGA设计流程······················································· 13 1.3 FPGA调试方法分析·········································································· 16 1.3.1 ILA使用方法································································· 16 1.3.2 VIO使用方法································································ 18 参考文献··································································································· 19 第2章 跨越鸿沟：从算法到硬件实现······································ 20 2.1 数字信号处理系统架构分析····························································· 20 2.2 数字信号处理系统设计方法····························································· 24 2.2.1 传统的RTL设计方法····················································· 24 2.2.2 基于模型的设计方法···················································· 27 2.2.3 高层次综合设计方法···················································· 30 2.2.4 三种设计方法的融合···················································· 32 2.3 FPGA设计性能描述指标··································································· 33 2.4 FPGA设计中的数据格式··································································· 36 2.4.1 浮点数基础知识···························································· 36 2.4.2 定点数基础知识···························································· 39 2.4.3 浮点数与定点数的比较················································· 44 2.4.4 浮点数到定点数的转换················································· 45 2.5 Xilinx开发工具对浮点数与定点数的支持········································· 47 2.5.1 System Generator对浮点数与定点数的支持················· 47 2.5.2 Vivado HLS对浮点数与定点数的支持··························· 51 参考文献··································································································· 53 第3章 数字信号处理中的基本运算·········································· 54 3.1 加法运算··························································································· 54 3.1.1 一位全加器··································································· 54 3.1.2 二进制加法原理···························································· 55 3.1.3 复数加法······································································· 58 3.1.4 加法树与加法链···························································· 59 3.2 累加运算··························································································· 60 3.2.1 累加原理······································································· 60 3.2.2 顺序累加器··································································· 60 3.2.3 滑动累加器··································································· 61 3.3 乘法运算··························································································· 63 3.3.1 二进制乘法原理···························································· 63 3.3.2 基于移位相加的乘法器················································· 65 3.3.3 基于ROM的乘法器······················································ 67 3.3.4 与固定数相乘的乘法器（KCM）·································· 73 3.3.5 复数乘法······································································· 76 3.4 除法运算··························································································· 77 3.4.1 基于恢复余数（Restoring）算法的除法器···················· 77 3.4.2 基于不恢复余数（Non-Restoring）算法的除法器········ 80 3.4.3 基于级数展开算法的除法器········································· 84 3.4.4 基于Newton-Raphson算法的除法器···························· 87 3.5 开方运算··························································································· 89 3.5.1 基于不恢复余数算法的开方运算·································· 89 3.5.2 基于非线性IIR滤波器算法的开方运算························· 95 3.5.3 复数求模····································································· 100 3.6 CORDIC算法··················································································· 103 3.6.1 CORDIC算法之圆周系统及其数学应用······················· 103 3.6.2 CORDIC算法之线性系统及其数学应用······················· 113 3.6.3 CORDIC算法之双曲系统及其数学应用······················· 116 3.6.4 统一的CORDIC算法形式············································ 120 3.6.5 CORDIC算法的硬件实现············································· 121 参考文献································································································· 126 第4章 FIR数字滤波器······························································ 127 4.1 FIR滤波器基本理论········································································ 127 4.1.1 直接型结构的FIR滤波器············································ 127 4.1.2 转置型结构的FIR滤波器············································ 129 4.1.3 线性相位FIR滤波器··················································· 131 4.2 串行FIR滤波器··············································································· 133 4.2.1 基于移位寄存器的串行FIR滤波器····························· 133 4.2.2 基于双端口RAM的串行FIR滤波器···························· 136 4.2.3 系数对称的串行FIR滤波器的设计····························· 139 4.2.4 两种串行结构的FIR滤波器性能比较·························· 142 4.3 全并行FIR滤波器··········································································· 143 4.3.1 基于直接型结构的全并行FIR滤波器·························· 143 4.3.2 基于转置型结构的全并行FIR滤波器·························· 144 4.3.3 基于脉动结构的全并行FIR滤波器····························· 145 4.3.4 系数对称的全并行FIR滤波器的设计·························· 147 4.3.5 三种全并行结构的FIR滤波器性能比较······················ 148 4.4 半并行FIR滤波器··········································································· 148 4.4.1 基于移位寄存器的半并行FIR滤波器·························· 148 4.4.2 基于多片双端口RAM的半并行FIR滤波器················· 153 4.4.3 基于单片单端口RAM的半并行FIR滤波器················· 155 4.4.4 系数对称的半并行FIR滤波器的设计·························· 159 4.4.5 三种半并行结构的FIR滤波器性能比较······················ 162 4.5 分布式FIR滤波器··········································································· 162 4.5.1 分布式算法原理·························································· 162 4.5.2 串行分布式FIR滤波器················································ 164 4.5.3 全并行分布式FIR滤波器············································ 169 4.5.4 半并行分布式FIR滤波器············································ 169 4.5.5 三种分布式FIR滤波器性能比较································· 171 4.6 快速卷积型FIR滤波器···································································· 171 4.6.1 线性卷积的计算方法及运算量分析···························· 172 4.6.2 圆周卷积的计算方法及运算量分析···························· 174 4.6.3 从线性卷积到FFT的跨越············································ 177 4.6.4 计算长数据序列线性卷积的两种算法························· 179 4.6.5 应用重叠保留法实现高阶FIR滤波器·························· 185 4.7 多通道FIR滤波器··········································································· 188 4.8 多频响FIR滤波器··········································································· 192 4.9 总体性能分析················································································· 194 参考文献································································································· 196 第5章 直接数字频率合成························································· 197 5.1 基于IIR滤波器的DDS····································································· 197 5.2 基于LUT的DDS·············································································· 199 5.2.1 常规型基于LUT的DDS··············································· 199 5.2.2 通过LFSR改善SFDR···················································· 206 5.2.3 通过Taylor级数改善SFDR·········································· 209 5.2.4 利用对称性压缩存储波形··········································· 210 5.3 基于双模互质算法的DDS······························································· 213 5.3.1 双模互质算法的基本原理··········································· 213 5.3.2 双模互质算法的硬件实现··········································· 216 5.4 基于CORDIC算法的DDS································································ 217 5.5 多通道DDS····················································································· 221 5.6 多路并行DDS·················································································· 222 5.7 产生其他波形················································································· 225 参考文献································································································· 226 第6章 多速率信号处理····························································· 227 6.1 抽取和抽取滤波器·········································································· 227 6.2 插值和插值滤波器·········································································· 231 6.3 分数速率的转换·············································································· 232 6.4 六个恒等式及其典型应用······························································· 233 6.5 多相滤波器····················································································· 237 6.5.1 多相抽取滤波器的基本理论······································· 237 6.5.2 多相抽取滤波器的硬件实现······································· 241 6.5.3 多相插值滤波器的基本理论······································· 261 6.5.4 多相插值滤波器的硬件实现······································· 266 6.6 CIC滤波器······················································································· 268 6.6.1 CIC滤波器基本理论···················································· 268 6.6.2 CIC滤波器的位增长问题············································· 273 6.6.3 CIC滤波器应用于抽取系统中····································· 274 6.6.4 CIC滤波器应用于插值系统中····································· 282 6.7 半带滤波器····················································································· 284 6.7.1 半带滤波器的基本理论··············································· 284 6.7.2 半带滤波器应用于抽取系统中···································· 286 6.7.3 半带滤波器应用于插值系统中···································· 288 参考文献································································································· 291 第7章 快速傅里叶变换······························································ 292 7.1 从DFT到FFT··················································································· 292 7.2 基2 FFT处理器··············································································· 293 7.2.1 基2 FFT算法原理························································ 293 7.2.2 基2 FFT算法特征分析················································ 299 7.2.3 基2原位运算FFT处理器············································ 302 7.2.4 基2 SDF流水结构FFT处理器····································· 313 7.2.5 基2 MDC流水结构FFT处理器··································· 322 7.3 基4 FFT处理器··············································································· 329 7.3.1 基4 FFT算法原理························································ 329 7.3.2 基4 FFT算法特征分析················································ 340 7.3.3 基4 SDF流水结构FFT处理器····································· 342 7.3.4 基4 MDC流水结构FFT处理器··································· 345 7.3.5 基4 SDC流水结构FFT处理器····································· 349 7.4 几种流水结构FFT处理器的比较····················································· 356 7.5 IFFT与FFT的关系··········································································· 356 参考文献································································································· 357 第8章 一些细节问题·································································· 358 8.1 LUT不只是逻辑函数发生器···························································· 358 8.2 合理使用触发器·············································································· 363 8.2.1 避免过多控制集·························································· 363 8.2.2 避免使用锁存器·························································· 365 8.3 BlockRAM不只是数据存储····························································· 366 8.3.1 Block RAM配置方式···················································· 366 8.3.2 Block RAM应用案例···················································· 367 8.4 DSP48E1不只是乘法器··································································· 373 8.4.1 DSP48E1基本结构······················································· 373 8.4.2 DSP48E1应用案例······················································· 381 8.5 关于复位························································································· 399 8.6 跨时钟域的设计·············································································· 401 8.6.1 同步时钟的跨时钟域设计··········································· 401 8.6.2 异步时钟的跨时钟域设计··········································· 410 参考文献································································································· 422 后记······································································································· 423
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发表于 2015-8-18 11:18
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