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在原理图package的时候出现Parts DataBase中没有某个符号的Part Number是什么原因

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发布时间: 2012-12-19 20:37

正文摘要:

我在原理图package的时候出现Parts DataBase中没有某个符号的Part Number是什么原因? / x: t8 s( w* y7 ]检查symbols和Parts都有Part Number啊,错误提示如下,请高手帮忙解答。8 U8 Y( Z# ]; d2 [5 i3 u, ? &n ...

回复

lixiangxiang 发表于 2013-10-18 23:42
hittjd 发表于 2012-12-30 15:03
0 [1 }+ Q# l$ }2 a所以器件都做part了,而且可以确定是从part view里拖出来的。。。
5 M3 Z8 [0 {, k* i1 i
请教个问题,我在做part时,遇到下图的情况,好像是symbol的pin(s)没有映射,请问如何设置啊,谢谢

3.JPG (170.71 KB, 下载次数: 0)

3.JPG

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2.JPG
sunny_sun1022 发表于 2013-1-29 14:25
双击有问题的器件
sunny_sun1022 发表于 2013-1-28 09:07
打开DXDATABOOK,点击下图中黄色的按钮,如果有红色的原件,直接双击

Capture.JPG (10.24 KB, 下载次数: 0)

Capture.JPG
hittjd 发表于 2013-1-25 18:59
sunny_sun1022 发表于 2013-1-22 10:11
" L" R6 F- F, K' O你有试过在dxdatabook里面做verifacation 吗

; L9 G- Q% b! z& j" w  y& T3 N没有,请问这个该怎么做?
sunny_sun1022 发表于 2013-1-22 10:11
你有试过在dxdatabook里面做verifacation 吗
zxli36 发表于 2013-1-9 09:45
我想到比较好的办法是你能提取一个或者两个有代表性的库就可以了,然后放到论坛让高手看看。因为我做的是DxDatabook的方式的,symbol直接映射partnumber还真的没有做个,所以也不敢说能把问题解决了。已经发消息给你。
hittjd 发表于 2013-1-8 19:47
zxli36 发表于 2012-12-29 10:44
! y# N/ D* V4 A) I这个信息写的很清楚了,只能根据这个信息查先。真不行了就要发库给别人看了。
/ w8 w: W& Z! L' {
能给我发个你的邮箱么?我把原理图和库发给你,你帮我看看吧,拜托了!
simhfc 发表于 2012-12-30 22:41
做了Part之后,有没有改动过Symbol或者Cell的pin name / pin number ?
& ~5 h& e  e) u! n. {8 n# `& X8 s1 ?  I8 J
比较直接的办法是删除那个Part,用现有的Symbol和Cell重新建一个Part,然后去原理图里更换。
hittjd 发表于 2012-12-30 15:03
simhfc 发表于 2012-12-29 18:05 . p$ R7 x1 k; u5 T2 X! P
There is no Part Number: FCT16245 in the Parts; l' B! Y6 X# K6 e# d9 {" @: n
应该是只做了Symbol和Cell,没组成Part;
# |% f' w5 Y* Z/ q7 R
所以器件都做part了,而且可以确定是从part view里拖出来的。。。
simhfc 发表于 2012-12-29 18:05
There is no Part Number: FCT16245 in the Parts. a# o6 i: k! V* t, a
应该是只做了Symbol和Cell,没组成Part;& T# Z" Z2 k1 P) R( L6 f

+ X6 _5 s0 Z5 l/ ]6 L# ~. w所以说在实际工程的DxDesigner里,DxDatabook要用Part View,不要用Symbol View。
zxli36 发表于 2012-12-29 10:44
这个信息写的很清楚了,只能根据这个信息查先。真不行了就要发库给别人看了。
hittjd 发表于 2012-12-29 09:49
zxli36 发表于 2012-12-29 09:04
4 `/ I3 F4 p3 e$ e( u' V9 |; m能不能把你Package时的信息发上来大家看看。
" }; d( k4 M- e& f; C* L; k( z
Package时的信息如下,总共有二十几个问题,几乎所有器件都有问题,这个问题困扰我很长时间了,麻烦您帮我看看,非常感谢: `# M. t3 H/ a
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-------------------------------------------------------------------------------------------------------------------------------------------------------, A6 r5 {. j: g
Started C:\MentorGraphics\7.9.3EE\SDD_HOME\wv\win32\bin\packagerui.exe F:\demo_dx\demo_dx.prj /d Board1 /nobrowse /config "C:\MentorGraphics"- M& }6 B% f( p9 |8 ]
8 a1 Q) J! I0 _# P( u$ M! G
Packager Version: 020806.00! I" p3 |3 G3 P: F3 k

) E5 i% P4 I7 q% m+ b# ^4 kCommandline is: "C:\MentorGraphics\7.9.3EE\SDD_HOME\wg\win32\bin\package.exe -jF:\demo_dx\demo_dx.prj -nBoard1 -Add"
' }8 j$ M, ]8 [& |) l8 @- p9 F$ d- C& M
The Common Database is at "F:\demo_dx\database".
7 D# a; y& o8 x* L3 d5 |- u1 c
/ R7 F- `. l6 }. z1 h' ?The Root of this design is "Deme_Root_1".) {% x, R8 [. l

+ U  r) M+ R  M: n5 LThe Front End Snapshot of this design is "DxD".: x4 o) i6 B' |
! T4 }' ]3 H2 a' Q( X$ {- ^
The PCB Design Path of this design is at "F:\demo_dx\PCB\Board1.pcb".) N$ J  X. [' k6 L$ Q$ m% r% d

8 _6 `& c7 R/ C! l) y5 p1 K, X$ WThe Central Library is at "F:\Central_Library_for_DxD-Exp\Central_Library_for_DxD-Exp.lmc".
! ]& S1 k$ ]8 a) a8 E
/ B  O" J, N0 E% v- rUnable to determine the Disable Repackage status./ |2 V2 v2 p% C5 D( S( m
!Repackaging will be allowed!. L6 Y% T! A" ?3 u. I

" ?+ U  {% w: a  i. W4 ^The PDBs listed in the project file will be searched to satisfy the parts
1 E: z9 F3 Y$ ^) ~9 M/ Yrequirements of the iCDB only for parts not already found in the
$ a( w- m7 ~" R+ PTarget PDB.9 {- J' k1 w+ p3 A
2 w/ ~! Z/ p( d- z  C7 |
The AllowAlphaRefDes status indicates that reference; S+ r6 l9 E+ C9 A
designators containing all alpha characters should be deleted( z4 |) ?( n# _! E/ L1 {4 E
and the relevant symbols repackaged.
6 _- u9 U; g! W. _2 S9 D0 a% U5 M# i
( L% r+ |3 @) cThe cross mapping of symbol pin names to Part Number pin
1 h; d( Z& R1 o% p4 mnumbers will be checked for packaged symbols and mapped correctly" I8 E8 h" C7 E4 c3 U4 D- s" Z- Z! r9 J- D
for unpackaged symbols.
* @! {4 Y" F: }/ T( P% `
1 U7 E+ L& j8 B' _' c: J: u. aProperties that have been checked off in the Property Definition Editor' `% Z" \# J" D' h/ D1 G
found at Library Manager/Common Properties will be checked for value# V+ ]! J1 f" F0 C
differences between the PartsDB and the non-null properties on symbols.3 B$ m- P6 ^/ i- H  U
Those properties checked off (other than Part Number)
: E! T1 d! Z6 ?will not be transferred from the PartsDB to symbols.1 E  }: a: f% Y* A3 q% {. K
The following properties were checked off in the Property Definition Editor:
4 m, \/ \0 n4 a: g( F! y: a% L! ?- I"EPFIXEDWIDTH"& Z7 s( J  `. v. \
"EPFIXEDLENGTH"
% [9 }! e4 s6 [$ X"Term"" P% u1 Z' \' z( s6 V) h" V
"SIM_MODEL"/ C( q" ]2 U7 N# p. u0 D0 K
"SIM_MODEL_FILE"
+ l. r6 V9 u; N7 b5 M"Array Component"
. D4 a+ B, I8 h5 D  F"ICX_PART_MODEL"
" v+ Q+ i* O1 ^9 a; [& ^, U"Use Verilog"& z2 @2 M2 T, K& y! M$ {( _; F
"Order"
6 O: `/ ^; v- \& n"Parametric"" E! l, P" C1 X, l. S3 p
"Value2"6 w# f! g% h3 l+ Y- G# N
"Tech"1 C7 w$ G# l* h
"IBIS"
( y) W& R+ R) b) L% S6 m  R3 A"Part Label"+ g  d- k9 b- S: F$ @4 l& f
"VHDL Model"% ~% _' g3 |+ J# U8 R) `. w1 W1 G
"Verilog Model"
6 _0 E2 G2 o' W"Cost"
" X: p; w) }" j2 a"Tolerance"
6 ]: p7 g+ j3 s$ ["Part Number"' Z3 {6 ]: k, W$ l
"Value"
7 f* i4 H& N+ p# n* ]7 B+ w"Part Name". U* i6 M+ Y: }+ Z. @1 v
9 R: u( O! B, @- @. `
8 ?/ ~  p* K* s( F  ]& j/ _
Testing of Packaging is being terminated with 22 errors and 1 warnings.
; P3 [2 U3 o, D+ C. |/ ~& Z6 N* A% yDesign has NOT been packaged., S- K; w0 F4 y! Y2 F+ o1 R( r

8 j. V, U& |! k& T. nWriting to Log File: Integration\PartPkg.log; f! `8 E, {* J. a  q  r/ _* m% J2 ]) J

8 z9 n& Q1 p: C( K% h0 v4 Q/ QThere have been 22 errors and 1 warnings.
: x8 {- q7 l- }0 n0 l! M" z8 L8 M" l# P) [5 f
///////////////////////////////////////////////////////////
2 _5 d3 i( E+ x2 A" v1 _: D! x0 g7 Y///////////////////////////////////////////////////////////
0 U  d: l9 E+ l2 A' A( N///// The Log File will now be copied to this window. /////" e. P( A* Y4 h
///// Therefore the data above will also appear below ////// D/ s6 B- g# Q1 h4 `/ O0 D  o
///// with more specific error and warning messages. /////3 C+ Q: O( R2 X$ G( D6 I4 S- w
///////////////////////////////////////////////////////////
* A5 j8 ^( U7 z8 _# V' o2 E///////////////////////////////////////////////////////////
0 ?7 S/ |) p7 {' Q. \! {2 W
( }5 k% b) l& P' T
. Z$ O+ W/ I+ ?/ ~* y, _Packager8 ?& X) Y5 h4 ], p; {2 J
--------1 Z: e7 {) |) U  w( i
" \- M: N  K1 G* {( y
09:27 AM Saturday, December 29, 2012$ O+ H3 O; f( \' s  a- V
Job Name: F:\demo_dx\demo_dx.prj( Y1 ~. B4 }4 V6 p7 v6 @9 t

7 }0 K# H1 G  @7 l+ m  l
/ S4 {6 x7 R8 [1 \4 ~) d( l+ r1 TPackager Version: 020806.00
6 M& M( ]: |+ P, @9 t) q' H% V6 x1 n3 y
+ O* k# f. g! ]% A- H& o' gCommandline is: "C:\MentorGraphics\7.9.3EE\SDD_HOME\wg\win32\bin\package.exe -jF:\demo_dx\demo_dx.prj -nBoard1 -Add"+ ^9 f& Z# x1 @* D* T
* b$ \# F8 x5 K8 E' D
The Common Database is at "F:\demo_dx\database".
. e6 ?$ N3 ?! T* S1 p: Y
: @. |+ G/ R8 v7 d' q5 tThe Root of this design is "Deme_Root_1".8 V% G- l+ r- y' D

, S. G& M4 X4 x+ i' Q2 e( m( _The Front End Snapshot of this design is "DxD".' P0 U& J, F! R
& r7 N$ W% X, \5 N
The PCB Design Path of this design is at "F:\demo_dx\PCB\Board1.pcb".
+ w" p6 E1 ~6 k: R, X( q* b3 Y5 i$ S; Q  c# Y# w0 q. U1 Q
The Central Library is at "F:\Central_Library_for_DxD-Exp\Central_Library_for_DxD-Exp.lmc".
' t2 {" h: \+ C2 |$ U* F$ N: e, [1 V" w
Unable to determine the Disable Repackage status.
% p  v( V0 i! h, B4 ~!Repackaging will be allowed!7 `- s2 |/ Y! k; l2 [

' z; f( m4 a5 |" g4 t+ OThe PDBs listed in the project file will be searched to satisfy the parts
: Y% T! Y# s: d  {$ Srequirements of the iCDB only for parts not already found in the
/ r5 K1 l' S+ v$ qTarget PDB.* p7 ~1 w' L1 T9 Z/ I+ C  e) c. n

8 u, J2 d4 p& a3 k- eThe AllowAlphaRefDes status indicates that reference! h8 h+ i# R$ G  B3 ~9 K, p
designators containing all alpha characters should be deleted8 y" Q- p3 V) Y* e7 [
and the relevant symbols repackaged.' ~' ]* \$ a' n: |0 ]

: R9 J5 z) [- a6 A9 n2 O) Q, W* lThe cross mapping of symbol pin names to Part Number pin( D% U# t, u$ S( z6 B
numbers will be checked for packaged symbols and mapped correctly2 J5 F4 x2 r1 C/ a& \% |) X( a
for unpackaged symbols.
& b! {1 x/ r+ \# n  c$ T, R3 w; E4 Q) u5 `
Properties that have been checked off in the Property Definition Editor, |6 [4 ?& `, i3 k
found at Library Manager/Common Properties will be checked for value! p/ K1 K& n7 O, z! [6 y4 \
differences between the PartsDB and the non-null properties on symbols.$ \: t& C, Z  E8 z
Those properties checked off (other than Part Number)) p) l6 U% k$ b5 p2 ~
will not be transferred from the PartsDB to symbols.) s- ?( [( X4 E6 S
The following properties were checked off in the Property Definition Editor:
7 H9 P( l0 _9 J- F: x+ i"EPFIXEDWIDTH"" L2 h5 I& h5 U- |* J& q
"EPFIXEDLENGTH"8 C' A7 e1 ~4 N
"Term"' w& |# D4 i$ A6 a, p7 p
"SIM_MODEL"
  b+ P/ ]. y! ^! P  B"SIM_MODEL_FILE"
. O' b4 e9 }  m0 P. c"Array Component"% c2 D6 x$ u. e1 I3 }
"ICX_PART_MODEL"4 Z7 B. p" K- H+ m6 ~
"Use Verilog"
# f" x) `- u6 G3 L" d"Order"9 E+ z6 k4 V8 e, o) Q, \5 C% i
"Parametric"5 I; u4 d( w3 o( P
"Value2"& {! b! L0 Z3 B' X" Q& ~
"Tech"
3 y) G) q5 I& d1 I* H"IBIS"" ?# |' e" n0 f2 ?
"Part Label"
2 l  F, e$ c! N- s& o' X"VHDL Model"
, ?8 [. E- L" B0 G2 T4 O( z  p"Verilog Model"+ b8 X8 G+ o; y1 i
"Cost"& K9 l5 _3 q$ W! J
"Tolerance"
* P& l, |$ K6 W4 m"Part Number"
' Q& K' K4 ]; O1 ?* C3 o! j) S"Value"9 x- s; H( u8 V1 l
"Part Name"( [' l5 @: J) \) z

5 ]- j& P8 u+ c  A/ k3 A  b) I& OChecking for errors in the ICDB...
; l( m& f2 L' x5 t& Z& Z
9 f, K" h  {" ^No errors found. Proceeding with packaging...
! [; Q* q% B2 L$ |/ D8 V6 R6 _/ p& a& @) U+ V$ ?6 t

7 y2 n8 {8 h- k8 O+ g% ~; B% }2 n% [6 Q0 H
Common Data Base has been read
! M1 K2 t' S2 u! H
; p% @7 |! o6 p9 \3 C9 V$ gTarget PDB Name: Integration\LocalPartsDB.pdb$ c# f+ k; l' B3 c8 q7 L) s5 |
! h7 e' |5 N2 [6 T  p
WARNING: There are no PartsDB partitions from which to extract parts.
+ I. N  ?; H# ]% m; GProceeding using the data in the local PartsDB "Integration\LocalPartsDB.pdb".1 |9 K6 x4 E' A9 T/ ?3 D7 N

) @" X( o$ p6 x" GNumber of Part Numbers: 21! D( n" T  ]& ~- w
Part Numb: BNC_1 -> Vend Part: % i) {9 T" X; L5 Z. m0 r3 v  {
Part Numb: CON_EDG_64 -> Vend Part:
: f# `/ w: \. r  ]* z, hPart Numb: C_P0.01pF -> Vend Part:
- K/ S7 B3 p3 r0 H& K* g3 d8 Z- nPart Numb: C_P3.3uF -> Vend Part:
$ C2 I/ w& G) o% J: r# Q0 n3 lPart Numb: C_P47pF -> Vend Part: ; i( ~/ D, x' p  c
Part Numb: C_0.1uF -> Vend Part:
4 X! W0 ?9 U5 Z, K9 Q& s: TPart Numb: DG419AK -> Vend Part:
/ p) ~( f8 s$ C; p5 |: [- wPart Numb: EPC1064 -> Vend Part: , d0 x6 o" n* y& l" v
Part Numb: EPF8282A -> Vend Part:
1 d2 I) n# }* J  Z& D; q: V2 ^Part Numb: FCT16245 -> Vend Part:
% ?% H3 U1 V1 L( J# gPart Numb: LED -> Vend Part:
/ _) A0 R5 G+ r9 z1 f- f+ ~Part Numb: L_50uH -> Vend Part: 6 w# z: ~  C. l4 B! D
Part Numb: R_2K -> Vend Part: : w" q% C. x" ?& d, U1 |
Part Numb: R_10K -> Vend Part: : S& l' C, E" ]4 x6 A6 H! j
Part Numb: R_100 -> Vend Part: 3 b& i7 j, e, {: z) w& R
Part Numb: R_220 -> Vend Part:
9 E) |6 O$ C* f; }& MPart Numb: R_510 -> Vend Part:
+ n2 a! w  g1 T( y* cPart Numb: TC55B4257 -> Vend Part: % G) C. X& A1 y! |+ s" A* N2 p: k' {: E
Part Numb: TLC5602A -> Vend Part: + d! s6 i. m+ q1 _
Part Numb: 20L10 -> Vend Part: 7 V: Q& B. _3 Z* K0 U' H
Part Numb: 74ACT574 -> Vend Part:
. f' T4 n: I3 X8 {/ d% Z
) r6 f1 E* r  a( P- g- _" m( \Number of Part Names: 1
* S0 w- L9 X4 X: D1 W1 _Part Name: TLE2037A -> Part Number:
7 b& M3 _" g- i7 q
- f4 C7 |3 d2 K2 c- e1 i; FNumber of Part Labels: 0
. G) Y4 w* p% J& s) K- D
* B/ I' r; R" V+ G" H- q
0 A. Z7 {  e. @; s% BChecking for value differences between non-null symbol properties and PartsDB properties,
8 V8 e1 w$ ?2 y# b: {but only for those properties checked off in the Property Definition Editor
; e6 t/ `8 m9 U" p4 y/ i: q+ f! [* y
Checking the validity of the packaging of prepackaged schematic& Y0 _8 _+ j4 F" J% G. G
symbols. Only the first error in symbols having the same' f' e: F3 p- s2 v( X7 J
Reference Designator will be reported.
% j- k5 R9 K0 @6 r2 S' e5 a
6 L$ I" w4 S0 e: J5 Y8 BERROR: There is no Part Number: CON_EDG_64 in the Parts
$ e$ T. d/ H1 l/ @DataBase for symbols with Part Name: CON_EDG_64 and Part Label: (null).+ I' |$ r# G8 \$ H" z( |. d# f
[Please add the Part Number to the PDB either directly
( |, y$ N8 e. I2 n' D1 ror by having the project file point to a PDB that contains it.]
# [' I# D- G! d% CThe relevant symbols are:; @3 `+ |8 c2 l# k/ i

! ?+ j" ^( v7 ]$ g! f Block Deme_Root_1, Page 1, Symbol $1I41 / V4 b) X! J3 X5 m8 x- U3 m6 T, v

6 K# b; C' M3 G5 v9 `5 PERROR: There is no Part Number: FCT16245 in the Parts2 k7 m1 I; Q9 j- ?+ U8 E
DataBase for symbols with Part Name: FCT16245 and Part Label: FCT16245.
; U0 ?3 t; S' q* l& _[Please add the Part Number to the PDB either directly
: C+ h* f# j: \/ w4 b: F, f4 J* Gor by having the project file point to a PDB that contains it.]
* ]) @6 T& ]. {1 Q6 Y  I  gThe relevant symbols are:( \5 s9 y, r) T4 W

+ U. O# t4 k; ~7 N+ @, { Block Deme_Root_1, Page 1, Symbol $1I1277 0 \) m" y  u/ L
Block Deme_Root_1, Page 1, Symbol $1I1424 7 ?9 i' |% x: y8 _5 N. }: q" H8 Z* O
Block Deme_Root_1, Page 1, Symbol $1I1395 0 j. `3 j3 O) ~
Block Deme_Root_1, Page 1, Symbol $1I1366 6 l+ Q0 ?. q  [! z
Block Deme_Root_1, Page 1, Symbol $1I1337
6 M# I' |6 h2 y( u: r Block Deme_Root_1, Page 1, Symbol $1I1308
zxli36 发表于 2012-12-29 09:04
能不能把你Package时的信息发上来大家看看。
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