我的port确信属性没问题的~~所以说不清楚嘛

怎會說不清楚。請看別人的帖子 https://www.eda365.com/thread-9218-1-1.html
/ ?% B& O/ C: X/ p帖子還是放在 [推薦主題] ，非常醒目呢。

解决问题，把PORT 改成off-page 就OK
$ _5 a. s. c2 E3 z- F7 E* C' y& Q虽然逻辑上说不清楚。。。

仔细看，我试着把那个PIN 没连接到任何网络，都会出现那个警告。。。
( s. `4 l. D' R$ C7 j+ |百思不得其解啊

這個很正常啊，例如有些芯片的管腳在手冊上說是 Bidirectional，可是它有很多模式可以選擇，好比說 GPIO INPUT、GPIO OUTPUT、UART TX，這時候你在ORCAD建立元件庫的時候，你可能選擇 Bidirectional ，可是實際上你可能是一個 GPIO INPUT PIN，所以會接某元件的 OUTPUT PIN，所以 ORCAD 會提醒你 Bidirectional Connected to Output Port。

1 j- a  T5 @5 ?6 ]1 S0 C9 P$ h  _9 C所以在件元件庫的時候，要慎選 PIN TYPE。另外一個方法是去修改， ERC Matrix 的規則，只怕 98%Bidirectional Connected to Output Port 是沒關係的，其他 2% 是真正有問題，如果沒仔細看，有時候會很淒慘的啦~~~~~~

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4 P8 b6 K! E1 X( qChecking Schematic: FPGA
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1 j) I& _- s) w7 W0 }' x2 iChecking Electrical Rules

WARNING [DRC0004]   Possible pin type conflict U1,IO_VB6N1_V21 Bidirectional Connected to Output Port:  FPGA, PAGE-A1DR FPGA END  (4.90, 2.20)
WARNING [DRC0004]   Possible pin type conflict U1,IO_VB7N0_AA19 Bidirectional Connected to Output Port:  FPGA, PAGE-A1DR FPGA END  (5.00, 4.80)
) Y( V& s: m7 S& z5 T9 MWARNING [DRC0004]   Possible pin type conflictWARNING [DRC0004]   Possible pin type conflict U1,IO_VB7N0_W15 Bidirectional Connected to Output Port:  FPGA, PAGE-A1DR FPGA END  (2.50, 5.30)  U1,IO_VB7N0_Y14 Bidirectional Connected to Output Port:  FPGA, PAGE-A1:DDR FPGA END  (2.50, 5.50)
WARNING [DRC0004]   Possible pin type conflict U1,IO_VB6N1_V20 Bidirectional Connected to Output Port:  FPGA, PAGE-A1:DDR FPGA END  (4.90, 2.10)
$ `. C9 ~* B! v3 IWARNING [DRC0004]   Possible pin type conflict U1,IO_VB6N1_V22 Bidirectional Connected to Output Port:  FPGA, PAGE-A1:DDR FPGA END  (4.90, 2.30)
WARNING [DRC0004]   Possible pin type conflict U1,IO_VB6N1_W22 Bidirectional Connected to Output Port:  FPGA, PAGE-A1:DDR FPGA END  (4.90, 2.70)
; W/ x. N2 [: yWARNING [DRC0004]   Possible pin type conflict U1,IO_VB7N0_W16 Bidirectional Connected to Output Port:  FPGA, PAGE-A1:DDR FPGA END  (2.50, 5.40)
WARNING [DRC0004]   Possible pin type conflict U1,IO_VB7N0_AB18 Bidirectional Connected to Output Port:  FPGA, PAGE-A1:DDR FPGA END  (5.00, 5.60)
* M9 M+ Q7 E$ x. B# @. AWARNING [DRC0004]   Possible pin type conflict U1,IO_VB7N0_Y17 Bidirectional Connected to Output Port:  FPGA, PAGE-A1:DDR FPGA END  (2.50, 5.60)
WARNING [DRC0004]   Possible pin type conflict U1,IO_VB6N1_Y21 Bidirectional Connected to Output Port:  FPGA, PAGE-A1:DDR FPGA END  (4.90, 3.10)
6 e+ e; f+ Q; m9 mWARNING [DRC0004]   Possible pin type conflict U1,IO_VB6N1_Y22 Bidirectional Connected to Output Port:  FPGA, PAGE-A1:DDR FPGA END  (4.90, 3.20)
" z' @/ Y* l$ }5 K  P/ C# D# uWARNING [DRC0004]   Possible pin type conflict U1,IO_VB7N0_AA18 Bidirectional Connected to Output Port:  FPGA, PAGE-A1:DDR FPGA END  (5.00, 4.70)
# I* u0 P. D. w% VWARNING [DRC0004]   Possible pin type conflict U1,IO_VB6N1_W21 Bidirectional Connected to Output Port:  FPGA, PAGE-A1:DDR FPGA END  (4.90, 2.60)
! u5 ^* M; s4 o- b/ @- RWARNING [DRC0004]   Possible pin type conflict U1,IO_VB7N0_AB19 Bidirectional Connected to Output Port:  FPGA, PAGE-A1:DDR FPGA END  (5.00, 5.70)
" ]2 D9 i1 b' J. t7 `7 aWARNING [DRC0004]   Possible pin type conflict U1,IO_VB6N1_R17 Bidirectional Connected to Output Port:  FPGA, PAGE-A1:DDR FPGA END  (4.90, 1.70)