把打开E:\cadence\myprj\prj\prj4\prj4.brd的Allegro关掉,或者输出网表时,不要勾选Create Or Update PCB Editor Board,导出网表后再到Allegro中导入。 |
我也不会 |
project 被鎖住了阿~, D, X1 n) T: r$ V0 a ERROR: File "prj4.brd" was locked on date "Tue Oct 21 15:53:20 2014" by user "Administrator" on system "USER-NGJHCN468J". Resolve lock file and re-run netrev. |
关于我们|手机版|EDA365 ( 粤ICP备18020198号 )
GMT+8, 2025-1-31 21:37 , Processed in 0.060653 second(s), 37 queries , Gzip On.
地址:深圳市南山区科技生态园2栋A座805 电话:19926409050