EE TO PADS 转换问题

xiesonny

我先是 AD的PCB  转换成 PADS 再转换成EE文件，在EE中将线画好。
然后用PADS，再导入EE画好的PCB，转换是成功，有提示转换问题，只有元件不见了，其它的还有。怎么解决！！！

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7 M# ~8 a+ Z7 _! |转换提示内容如下
% n$ {) O1 S' K0 F# W+ j5 |Expedition to PADS Layout Design and Libraries Translator (Version 9.5) 01/08/13 13:54:53
Copyright (c) 2012 Mentor Graphics Corp. - All rights reserved

------------------------------------------------------------
Input folder: D:\1\EE\PCB\EE.pcb
Output folder: EE_pads_5.pcb
; E& C% }0 V6 y. K! Q
[I] Preparing data...
7 Q8 u* d6 ^1 O1 s* bOutput file: EE_pads_5.pcb
[I] Loading...
[I] Translating Expedition design files from 'C:\Users\ADMINI~1\AppData\Local\Temp\' to PADS Layout design file
: y+ ?/ U! R7 D4 ~4 ]$ b0 A( t6 l[I] Reading Pad Stacks...
[I] Reading Cells...
' g# X* C3 T. C" l. o9 g$ o/ K[I] Reading Part Numbers...
[I] Reading Job Prefernces...
[I] Reading Net Classes...
  t: o- X' w0 L" \. s' g, D5 e[I] Reading Net Properties...
5 V: \* w7 \( @: ~% B1 Y[I] Reading Layout...
& Z. q( ^, Q  q7 L2 m& D+ D$ `[I] Translating data...
" r) N5 z' u; ^% i! D5 H0 A# a/ K" z[W] All coincident Pad Entry rules are translated to Default Rules level
[W] Discriminate Pad Entry rules found, and the rules were not translated.
! F( U- e- M' _) T5 i5 S( f[W] Route grid is not set. Primary part grid is used for setting design grid.
  i# g, E8 L/ |8 m8 C5 d' C( n- Q[W] Part type 'RES' is not found, and the component 'R6' was not translated.
6 }, f, D+ Y7 J9 ]% z' m- R[W] Part type 'RES' is not found, and the component 'R9' was not translated.
3 ]8 s# o, e2 b; Q4 g[W] Part type 'RES' is not found, and the component 'R10' was not translated.
[W] Part type 'RES' is not found, and the component 'R5' was not translated.
[W] Part type 'RES' is not found, and the component 'R8' was not translated.
[W] Part type 'RES' is not found, and the component 'R7' was not translated.
! h9 z& W. e+ c! U  F% x[W] Part type 'RES' is not found, and the component 'R4' was not translated.
4 J3 M: g5 N% F5 Z# h[W] Part type 'RES' is not found, and the component 'R3' was not translated.
9 V( T3 ?' k+ v% e/ b$ I+ G: R[W] Part type 'RES' is not found, and the component 'R2' was not translated.
[W] Part type 'RES' is not found, and the component 'R1' was not translated.
[W] Route outlines are not supported, and was not translated.
[W] Pin name 'R7-1' has wrong format. The pin was not included into the net 'GND'.
4 e  h. L; O% Z4 K# l- j- f! u[W] Pin name 'R6-1' has wrong format. The pin was not included into the net 'GND'.
[W] Pin name 'R8-1' has wrong format. The pin was not included into the net 'GND'.
[W] Pin name 'R9-1' has wrong format. The pin was not included into the net 'GND'.
% K$ {& |. A! ^* e; d" E% U[W] Pin name 'R10-1' has wrong format. The pin was not included into the net 'GND'.
[W] Net 'GND' don't have properly pin pair. Vias of the net were not translated and traces were translated to open coppers.
# C% \& }0 F) J2 b[W] Pin name 'R1-1' has wrong format. The pin was not included into the net 'NETR1_1'.
[W] Pin name 'R6-2' has wrong format. The pin was not included into the net 'NETR1_1'.
0 V+ c) ?& s0 N; b( V3 {/ o[W] Net 'NETR1_1' don't have properly pin pair. Vias of the net were not translated and traces were translated to open coppers.
[W] Pin name 'R2-1' has wrong format. The pin was not included into the net 'NETR2_1'.
[W] Pin name 'R7-2' has wrong format. The pin was not included into the net 'NETR2_1'.
* V, c0 L& H' i% l1 U[W] Net 'NETR2_1' don't have properly pin pair. Vias of the net were not translated and traces were translated to open coppers.
[W] Pin name 'R3-1' has wrong format. The pin was not included into the net 'NETR3_1'.
[W] Pin name 'R8-2' has wrong format. The pin was not included into the net 'NETR3_1'.
[W] Net 'NETR3_1' don't have properly pin pair. Vias of the net were not translated and traces were translated to open coppers.
[W] Pin name 'R4-1' has wrong format. The pin was not included into the net 'NETR4_1'.
[W] Pin name 'R9-2' has wrong format. The pin was not included into the net 'NETR4_1'.
[W] Net 'NETR4_1' don't have properly pin pair. Vias of the net were not translated and traces were translated to open coppers.
: N7 p- o/ c, d$ `( L. |. N[W] Pin name 'R5-1' has wrong format. The pin was not included into the net 'NETR5_1'.
[W] Pin name 'R10-2' has wrong format. The pin was not included into the net 'NETR5_1'.
[W] Net 'NETR5_1' don't have properly pin pair. Vias of the net were not translated and traces were translated to open coppers.
[W] Pin name 'R2-2' has wrong format. The pin was not included into the net 'VCC'.
[W] Pin name 'R1-2' has wrong format. The pin was not included into the net 'VCC'.
[W] Pin name 'R3-2' has wrong format. The pin was not included into the net 'VCC'.
[W] Pin name 'R4-2' has wrong format. The pin was not included into the net 'VCC'.
[W] Pin name 'R5-2' has wrong format. The pin was not included into the net 'VCC'.
[W] Net 'VCC' don't have properly pin pair. Vias of the net were not translated and traces were translated to open coppers.
[I] Completed

dali618

为什么要转，你不是两个工具都会用么

xiesonny

dali618 发表于 2013-1-8 15:48
为什么要转，你不是两个工具都会用么

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, d: J! }* ~% P3 @$ V有些工程，比如AD的，或者PADS的，工程可能已经做了一部分，或者修改比较多，想转入EE中再重新布线。完成后，再转回PADS或者AD中，为一个完整的工程。

v520

我在转换时遇到icdb出错 请问楼主是怎么设置的？、

TOTO

把CES关闭再转试一试。

xiesonny

TOTO 发表于 2013-1-9 16:21
把CES关闭再转试一试。

呵呵，如果EE不能转PADS，比如导入错误，那么关闭CES后，的确就可以导入了。这个方法我知道。
* I# Q2 E+ F( D: T/ M/ S我想知道的是，PADS转EE的文件，如果开启CES后，是不能导入的，但关闭后，虽然能导入，但就如我所问的问题一样，没有元件封装的。其它的可以转换

TOTO

xiesonny 发表于 2013-1-9 19:36
) W, s2 [; ]) ?0 [呵呵，如果EE不能转PADS，比如导入错误，那么关闭CES后，的确就可以导入了。这个方法我知道。
) A7 C% ~4 S. y( B1 O我想知道的 ...

软件之间的转换不可能十分完美，由于没有看到实际情况，不太清楚造成所述问题的原因所在，但目前的解决方法可以保留转换后工程的线，铜皮孔等需要的信息，拷贝到没有问题的PADS工程上.由于本人能力有限，不知道这样的方法是否可以帮助您解决问题

xiesonny

TOTO 发表于 2013-1-10 08:46
( W* P7 \& e! @+ T7 P/ S) }% G3 Y软件之间的转换不可能十分完美，由于没有看到实际情况，不太清楚造成所述问题的原因所在，但目前的解决方 ...

8 ~+ N% _2 w% a3 \: O# I) ^
呵呵，这样的解决方案貌似不好。
我说一下具体过程吧。

9 W& Z" c5 X2 G+ b) A1，不管用什么软件生成网络表，或者用原生的DX， 然后在EE中做的PCB工程。基本可以完美导入PADS中。
! [5 a! Z; i1 H. S& ~# {5 N1 X2 f2，如果你是AD转PADS转EE，或者PADS转EE，你再想从EE转回PADS，问题就来了，如果打开了CES，要关闭CES才能导入PADS,虽然能导入了，但是，元件却不见了，就像我顶楼所贴的提示内容差不多。

* X* o! }& `7 G6 s/ B9 t$ e8 J我想解决的是2过程。
因为有些工程可能原来是AD的，或者PADS，这样可以在EE中布局布线，完成后，再导回PADS，这样就是一个完整的工程。

donyli

请问下，EE怎么转PADS？
谢谢！

YiXue

规则都导进去了吗？

Yuanlonglong

CES没打开，在PADS里面import出现iCDB无法打开的错误