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本帖最后由 紫菁 于 2017-9-14 11:21 编辑
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下面链接是Cadence SPB16.3及最新Hotfix下载地址,需要的可以下载!
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Hotfix057更新的内容如下所示:
4 _( h: P8 w! U$ |DATE: 12-19-2012 HOTFIX VERSION: 057
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4 A+ ]) d. L" N$ [% o& _. mCCRID PRODUCT PRODUCTLEVEL2 TITLE; B8 D E- z! G: |( \# E r# ?
===================================================================================================================================
3 N" z6 X8 |" i% l/ s1080193 SIG_INTEGRITY ASSIGN_TOPOLOGY View Topology freeze during the extraction of the net connected to resistor network.
/ \+ e0 ?5 g+ O. y1082509 ALLEGRO_EDITOR INTERFACES Export DXF in the 16.3 S056 roatate some pins.
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# C. i% k' L2 ADATE: 12-7-2012 HOTFIX VERSION: 056
$ Y& F4 P5 [/ C9 r; G- k, b===================================================================================================================================
+ u5 {) e( g3 b B5 N9 u% a( zCCRID PRODUCT PRODUCTLEVEL2 TITLE( ?9 q, y0 G6 H3 m! A" v
===================================================================================================================================
# m9 F4 b3 B4 A K1 _' {4 W825813 CONCEPT_HDL CORE HDL crashes when copying a property from one H block to other; x: ~; o4 I2 z6 _
871886 CONCEPT_HDL CORE Browse button in Signal Integrity window of DE-HDL option causes program crash7 e2 [' O# \! L" v
871899 CONCEPT_HDL CORE 'Multiple:' column of Grid window in DE-HDL option is too wide: l8 y: `: C! Q
873917 CONCEPT_HDL CORE Markers dialog is not refreshed
' n8 {6 \# G! ^* a/ a' c887887 CONCEPT_HDL CORE Option to find unconnected Pins/Nets with DEHDL L License# A( |% ]: G" e) \# H
892857 CONCEPT_HDL CORE packager treats R? as a unique reference designator
" P" I' l& B8 M; x! u1075587 CONCEPT_HDL PAGE_MGMT Unable to insert page in schematic
# a: l7 S8 E6 p1078682 ALLEGRO_EDITOR DRC_CONSTR Unaccetable slowness with Slide |
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