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标题: 新手请教 [打印本页]

作者: cuilei83    时间: 2008-8-29 14:48
标题: 新手请教
#1 Error [ALG0031] Pin number missing from Pin "1" of Package CAP NP , C2: SCHEMATIC1, PAGE1 (3.20, 2.20). All pins should be numbered. - x( e# q$ X- l" H
#2 Error [ALG0031] Pin number missing from Pin "2" of Package CAP NP , C2: SCHEMATIC1, PAGE1 (3.20, 2.20). All pins should be numbered.
6 H7 t: j4 K0 v2 c: v: q#3 Error [ALG0031] Pin number missing from Pin "1" of Package SW PUSHBUTTON , S1: SCHEMATIC1, PAGE1 (1.90, 2.10). All pins should be numbered.
/ L+ U' k6 @0 M) v! ?% s#4 Error [ALG0031] Pin number missing from Pin "2" of Package SW PUSHBUTTON , S1: SCHEMATIC1, PAGE1 (1.90, 2.10). All pins should be numbered.
9 N0 Z3 d8 H* K0 u1 _. J# m#5 Error [ALG0031] Pin number missing from Pin "1" of Package CAP NP , C3: SCHEMATIC1, PAGE1 (3.20, 2.60). All pins should be numbered.
) M5 S4 b6 a0 T' G: }: T#6 Error [ALG0031] Pin number missing from Pin "2" of Package CAP NP , C3: SCHEMATIC1, PAGE1 (3.20, 2.60). All pins should be numbered.
5 P0 J3 w; H( [) v& T#7 Error [ALG0031] Pin number missing from Pin "1" of Package R , R1: SCHEMATIC1, PAGE1 (2.50, 3.50). All pins should be numbered. ; l8 p# n) {( v) A
#8 Error [ALG0031] Pin number missing fr om Pin "2" of Package R , R1: SCHEMATIC1, PAGE1 (2.50, 3.50). All pins should be numbered. # g( n9 F1 V# M. a: G  }
#9 Error [ALG0031] Pin number missing from Pin "1" of Package 4 HEADER , JP1: SCHEMATIC1, PAGE1 (3.60, 3.10). All pins should be numbered. $ {: o5 f5 N' t; {% c
#10 Error [ALG0031] Pin number missing from Pin "2" of Package 4 HEADER , JP1: SCHEMATIC1, PAGE1 (3.60, 3.10). All pins should be numbered. 8 ~! v: w9 x& P5 ^) U7 d0 U( f
#11 Error [ALG0031] Pin number missing from Pin "3" of Package 4 HEADER , JP1: SCHEMATIC1, PAGE1 (3.60, 3.10). All pins should be numbered.
) H  k( C! B: p& p; K#12 Error [ALG0031] Pin number missing from Pin "4" of Package 4 HEADER , JP1: SCHEMATIC1, PAGE1 (3.60, 3.10). All pins should be numbered.
! g5 E  S* p6 |#13 Error [ALG0031] Pin number missing from Pin "1" of Package 8 HEADER , JP2: SCHEMATIC1, PAGE1 (3.60, 3.60). All pins should be numbered.
/ e1 ?# l0 I0 A' r#14 Error [ALG0031] Pin number missing from Pin "2" of Package 8 HEADER , JP2: SCHEMATIC1, PAGE1 (3.60, 3.60). All pins should be numbered.
' A* g8 W' F* q9 \#15 Error [ALG0031] Pin number missing from Pin "3" of Package 8 HEADER , JP2: SCHEMATIC1, PAGE1 (3.60, 3.60). All pins should be numbered. 9 g1 l0 B( F9 K. \* H. K
#16 Error [ALG0031] Pin number missing from Pin "4" of Package 8 HEADER , JP2: SCHEMATIC1, PAGE1 (3.60, 3.60). All pins should be numbered. ! E) l. o6 U2 ]* s& ]# t- g8 D
#17 Error [ALG0031] Pin number missing from Pin "5" of Package 8 HEADER , JP2: SCHEMATIC1, PAGE1 (3.60, 3.60). All pins should be numbered.
0 t4 b/ b- e. s" u, `; j4 ^4 O+ ?#18 Error [ALG0031] Pin number missing from Pin "6" of Package 8 HEADER , JP2: SCHEMATIC1, PAGE1 (3.60, 3.60). All pins should be numbered.
# ~* m7 ^- x3 K1 Z$ c3 b2 R#19 Error [ALG0031] Pin number missing from Pin "7" of Package 8 HEADER , JP2: SCHEMATIC1, PAGE1 (3.60, 3.60). All pins should be numbered. 5 A0 X6 ?$ [: s% D+ c, h; D6 T
#20 Error [ALG0031] Pin number missing from Pin "8" of Package 8 HEADER , JP2: SCHEMATIC1, PAGE1 (3.60, 3.60). All pins should be numbered. 6 x% H6 ?/ ^9 \5 G9 V8 E
#21 Error [ALG0031] Pin number missing from Pin "1" of Package CRYSTAL , Y1: SCHEMATIC1, PAGE1 (3.70, 2.40). All pins should be numbered.
0 r/ f- p1 ~0 M! [) z8 X#22 Error [ALG0031] Pin number missing from Pin "2" of Package CRYSTAL , Y1: SCHEMATIC1, PAGE1 (3. 70, 2.40). All pins should be numbered. " o0 K. ]; Y; h) W$ o
#23 Error [ALG0031] Pin number missing from Pin "1" of Package CAP_0 , C1: SCHEMATIC1, PAGE1 (2.50, 2.10). All pins should be numbered. 2 v% F5 F/ v0 a: h
#24 Error [ALG0031] Pin number missing from Pin "2" of Package CAP_0 , C1: SCHEMATIC1, PAGE1 (2.50, 2.10). All pins should be numbered.
. }$ Z- Z; A. B#25 Aborting Netlisting... Please correct the above errors and retry.
- b+ \% \  T9 T8 W' D生成网络表示产生如上错误,该如何更正???
作者: lihuizju    时间: 2008-8-29 14:54
引脚没有命名。
作者: cuilei83    时间: 2008-8-29 14:59
标题: 回复 2# 的帖子
怎么修改啊 能不能详细介绍一下?
作者: lxwuming    时间: 2008-8-29 16:57
Number的框框没有任何数字,这是Allgro不允许的,通常会发生这样的问题会在原本的线路图是9.X的版本,然后我们用10.X或更高的版本开启的时候所产生的

1.JPG (37.33 KB, 下载次数: 6)

1.JPG

作者: cuilei83    时间: 2008-8-29 17:20
标题: 回复 4# 的帖子
这个改过来了 可是又产生错误了如下
3 Q, l3 I! \. t* j********************************************************************************
# k- z0 V2 r1 z2 ~, s0 k*
8 ~: z0 ?1 M! J1 K7 R* Netlisting the design / l2 H$ t  N' `$ d+ J7 v, f, Y
*6 D4 A  F& ~; h0 [6 t" P+ [; H8 P' ?
********************************************************************************/ W/ x& [7 q, l5 u
Design Name:
' d( q9 E$ Z& S5 l) \, X( ?; z7 t9 CC:\wenjian1\yanli2.dsn
5 A+ A: K# n% z+ s/ G) B9 \Netlist Directory:
. i( w) `9 ~  r& z/ Y4 bC:\wenjian1\allegro
+ H$ Q: q& p, d$ s( [$ o# B( E. u) a; HConfiguration File:2 ?/ t( F$ o4 l0 y6 K" L5 ^
C:\Cadence\SPB_15.2\tools\capture\allegro.cfg  J# F4 _- e: w+ }

/ I: Y0 a) j* G, k/ {! @Spawning... "C:\Cadence\SPB_15.2\tools\capture\pstswp.exe" -pst -d "C:\wenjian1\yanli2.dsn" -n "C:\wenjian1\allegro" -c "C:\Cadence\SPB_15.2\tools\capture\allegro.cfg" -v 3 -j "PCB Footprint"
- f9 R! _$ S# B7 j' ?2 y5 c#1 Warning [ALG0016] Part Name "CAP_0_CPCYL1/D.300/LS.200/.034_10UF" is renamed to "CAP_0_CPCYL1/D.300/LS.200/.034_".; ]# t4 a- s5 x" v# Y- r
#2 Warning [ALG0016] Part Name "CAP NP_0_RAD/.200X.100/LS.100/.031_30P" is renamed to "CAP NP_0_RAD/.200X.100/LS.100/.".
) J6 c& Q( g* w/ t4 w7 H. r#3 Warning [ALG0016] Part Name "CAP NP_1_RAD/.200X.100/LS.100/.031_30P" is renamed to "CAP NP_1_RAD/.200X.100/LS.100/.".
) |+ P2 S8 R* D7 T#4 Warning [ALG0016] Part Name "4 HEADER_0_SIP/TM/L.400/4_4 HEADER" is renamed to "4 HEADER_0_SIP/TM/L.400/4_4 HEA".
* A7 B9 }' J$ n1 w#5 Warning [ALG0016] Part Name "8 HEADER_0_SIP/TM/L.800/8_8 HEADER" is renamed to "8 HEADER_0_SIP/TM/L.800/8_8 HEA"./ C4 n! P& @3 N1 |6 p/ @
#6 Warning [ALG0016] Part Name "SW PUSHBUTTON_0_RAD/.400X.200/LS.300/.034_RESET" is renamed to "SW PUSHBUTTON_0_RAD/.400X.200/L".
5 H2 m" C" T; e8 [; b3 ~# A* g+ Q$ k#7 Warning [ALG0016] Part Name "8051_DIP.100/40/W.600/L2.050_8051" is renamed to "8051_DIP.100/40/W.600/L2.050_80".6 `& v: v5 I# O- U
#8 Warning [ALG0016] Part Name "74LS373_DIP.100/20/W.300/L1.075_74LS373" is renamed to "74LS373_DIP.100/20/W.300/L1.075".0 r2 h0 }; ]6 G: L7 z7 F
#9 Warning [ALG0016] Part Name "27512_DIP.100/28/W.600
- K& g0 C( i$ X/L1.400_27512" is renamed to "27512_DIP.100/28/W.600/L1.400_2".1 d& n3 a: s9 L7 B% j
#10 Warning [ALG0016] Part Name "CRYSTAL_0_RAD/.400X.150/LS.300/.034_12M" is renamed to "CRYSTAL_0_RAD/.400X.150/LS.300/".
1 h5 s9 c6 w, H9 f! K: u6 }Scanning netlist files ...
. E8 p# d7 y$ ]6 ^. U5 U3 OLoading... C:\wenjian1\allegro/pstchip.dat5 s: Q$ G; _) [% i
Loading... C:\wenjian1\allegro/pstchip.dat& j8 n' L0 v# h8 t; o! N7 |
Loading... C:\wenjian1\allegro/pstxprt.dat
& G. j2 t- e! D) \Loading... C:\wenjian1\allegro/pstxnet.dat
( G( C% f* u* A$ \packaging the design view...
7 F9 I, M, s: l8 L
) K! n2 `% X. n% B: p" P+ Q. v* CExiting... "C:\Cadence\SPB_15.2\tools\capture\pstswp.exe" -pst -d "C:\wenjian1\yanli2.dsn" -n "C:\wenjian1\allegro" -c "C:\Cadence\SPB_15.2\tools\capture\allegro.cfg" -v 3 -j "PCB Footprint"6 G. a2 ~9 k/ ]' y
% k7 S/ ?! f( h8 Z0 h
, S& G. R( p6 W- b4 o! R- e
*** Done ***
% M1 h. h4 f3 b0 Y& p: K$ ^- o/ t  R4 B* g( r; M0 Q
********************************************************************************
# H2 E6 h* U9 r0 S6 N. k*# @+ c; W# _! ]' t7 Q0 W% ]
* Updating Allegro Board
& l- q- ~# y2 E*5 G- p( r  l, n; {" j& {5 K
********************************************************************************1 }4 Q( _- V* T6 n
Netlist Directory:7 Q4 t+ r8 e2 a; q  Y7 D9 s, n
C:\wenjian1\allegro
/ V4 m. _6 Z5 j# T, H2 EInput Allegro Board:
: x3 Q4 ?5 H" R9 RC:\wenjian1\allegro\yanli2.brd. e7 N) s4 t6 ?" g1 A) y7 |
Output Allegro Board:
7 k+ B5 W, Y* j9 aC:\wenjian1\allegro\yanli2.brd4 y7 `+ s2 S" n  z% a) J
4 c  ~( x& b2 ]. S
Spawning... netrev.exe -5 -y 1 -n -i "C:\wenjian1\allegro" "C:\wenjian1\allegro\yanli2.brd" "C:\wenjian1\allegro\yanli2.brd"
: B  d3 ]1 U  ?: Q% PReading File : C:/wenjian1/allegro/pstchip.dat              # C4 h5 ^, Z3 n) D" m
(00:00:00.00)
( H$ g3 X" v1 n: x) jReading File : C:/wenjian1/allegro/pstxprt.dat              & \+ U' N' Y, V5 b1 N
(00:00:00.00)4 w- U9 }; A" Z, C2 {! L
Reading File : C:/wenjian1/allegro/pstxnet.dat              
/ m7 [4 w# ~/ c3 l' `4 y+ w% Z(00:00:00.00)" r  s- ]* ^3 G& W: {, l" r0 p
Starting to process component instances" \4 h9 u- X$ v- Z% p0 j

: Q9 {7 U9 E) K6 unetrev run on Aug 29 17:10:17 2008/ X  r* d" `' Z
   DESIGN NAME : 'YANLI2'
* f, |4 a$ M2 x: I2 r' O7 H7 ^   PACKAGING ON Apr  6 2004 19:58:38) t* K6 K& g! x
& v1 h" ]0 `# L7 K- w& ]0 B) h7 A

: y, F2 G* [1 s9 [- [# _ 12 errors detected
) ?: }" m, r/ A1 i9 E% y# G No oversight detected
* R# _- u) {- ^; ?1 }8 l No warning detected
' ~2 k# ]& s3 U7 V  ?8 D
' R; E! X9 x" i0 z4 `cpu time      0:00:12
. @0 T* F* A8 Zelapsed time  0:00:00& Y/ x# g' k3 [

; u# Q$ \; H! S/ i% ?* u3 |
$ ]3 e+ s3 J4 _# UExiting... netrev.exe -5 -y 1 -n -i "C:\wenjian1\allegro" "C:\wenjian1\allegro\yanli2.brd" "C:\wenjian1\allegro\yanli2.brd"
6 x* d4 E# o2 y. w" S& C. dCadence Design Systems, Inc. netrev 15.2 Fri Aug 29 17:10:17 2008; S. i- R+ ^$ U& h% F8 z$ c
(C) Copyright 2002 Cadence Design Systems, Inc.
$ R( {' \1 \4 r6 z! L/ e% W/ ]- `! o
) h/ ~  ?& y2 _! `0 K2 A------ Directives ------1 _3 r3 d2 I4 C
+ ~0 }+ [, K, }
RIPUP_ETCH FALSE;' n1 l6 W0 v! @' O4 ?: x# Q5 ^' u
RIPUP_SYMBOLS ALWAYS;* X) Z7 b# g) C
MISSING SYMBOL AS ERROR FALSE;# s6 w0 _2 v, t. U& ?  \5 y
SCHEMATIC_DIRECTORY 'C:\wenjian1\allegro';% [/ _' m% C8 _6 V  ^9 J2 r( e+ ?
BOARD_DIRECTORY '';
* z6 l8 S, J4 j* \+ \OLD_BOARD_NAME 'yanli2.brd';
' b  z  P% y. _( i3 u; P6 A; ^: eNEW_BOARD_NAME 'yanli2.brd';
, G; L  A( m' U" V  D2 X7 E, L
6 q+ u9 M0 j- L5 O& yCmdLine: netrev.exe -5 -y 1 -n -i C:\wenjian1\allegro C:\wenjian1\allegro\yanli2.brd C:\wenjian1\allegro\yanli2.brd2 _2 d8 y* n1 `2 g2 v* ^5 h
! S" J9 K- V4 [8 f! g1 T
------ Preparing to read pst files ------8 c' x  a8 y& L. t

; B3 R4 I# d7 [+ P6 VStarting to read C:/wenjian1/allegro/pstchip.dat % o* z0 @2 z$ Q; k
   Finished reading C:/wenjian1/allegro/pstchip.dat (00:00:00.00)
) b/ B8 u  G) P. ?* B; zStarting to read C:/wenjian1/allegro/pstxprt.dat ) v' W) y" `+ S2 X+ `
   Finished reading C:/wenjian1/allegro/pstxprt.dat (00:00:00.00)1 D- j% q: [2 I) M: ^) q9 |& q! R
Starting to read C:/wenjian1/allegro/pstxnet.dat
/ C) M! |: R0 r4 p, q   Finished reading C:/wenjian1/allegro/pstxnet.dat (00:00:00.00)
% q' a- F+ x. |' c9 V
2 J! N' D% b" J" _, h" p------ Oversights/Warnings/Errors ------
+ u: Z( D8 X+ B1 q2 K, K4 F( f5 e) Y

( A. P) e) F8 M: |) I( `& M#1   ERROR(302) Device library error detected.) C5 B3 L& W& _4 v. `+ x2 a
9 g/ H% ]& Q# C: G
Problems with device 'CRYSTAL_0_RAD/.400X.150/LS.300/'. JEDEC_TYPE property 'RAD/.400X.150/LS.300/.034' is illegal: 'Package name is not legal.'.9 Y) C1 N0 H3 s; q0 {, {7 f$ ^

; `. \2 F$ x9 XDevice 'CRYSTAL_0_RAD/.400X.150/LS.300/' has library errors. Unable to transfer to Allegro.
; _: D7 l$ r8 D% ~8 F/ q9 P: ]" g9 `
#2   ERROR(302) Device library error detected.3 Y: m! R! b5 [& v: M

/ l# s; o* X% g: |Problems with device '27512_DIP.100/28/W.600/L1.400_2'. JEDEC_TYPE property 'DIP.100/28/W.600/L1.400' is illegal: 'Package name is not legal.'.
# {* t: D/ X: J
/ M5 U0 H$ V# }* r( H$ n  b2 k. V- qDevice '27512_DIP.100/28/W.600/L1.400_2' has library errors. Unable to transfer to Allegro.
3 ]6 A/ ?: Y7 C# s% a# ~& B' k( j" |# B6 j  f, {
#3   ERROR(302) Device library error detected.
/ \: d* g, P% ]- h6 {8 t' |/ ]9 R
Problems with device '74LS373_DIP.100/20/W.300/L1.075'. JEDEC_TYPE property 'DIP.100/20/W.300/L1.075' is illegal: 'Package name is not legal.'.% S& ~, x+ C, @9 y6 u; V

* D: a! H9 V2 QDevice '74LS373_DIP.100/20/W.300/L1.075' has library errors. Unable to transfer to Allegro.  G- d) F. B. h. }7 v+ ^
! T/ }# N% t7 [
#4   ERROR(302) Device library error detected.) ^' w9 {' D# ^$ q7 E7 Q

$ R- ?9 m2 ]7 S% `Problems with device '8051_DIP.100/40/W.600/L2.050_80'. JEDEC_TYPE property 'DIP.100/40/W.600/L2.050' is illegal: 'Package name is not legal.'.
: {3 f2 J+ Y; @: ^. [( ~* o
; n5 M  U0 f: A. E; V" G: iDevice '8051_DIP.100/40/W.600/L2.050_80' has library errors. Unable to transfer to Allegro.' X1 [# t. s" x1 n0 M* c
0 v4 \0 _# \  f0 x) c
#5   ERROR(302) Device library error detected.' p# r) [" `" ~
- }, f+ \# j8 n' n# k
Problems with device 'SW PUSHBUTTON_0_RAD/.400X.200/L'. JEDEC_TYPE property 'RAD/.400x.200/LS.300/.034' is illegal: 'Package name is not legal.'.
# ^+ V; l+ F. _2 C8 J1 N' o: S( @
Device 'SW PUSHBUTTON_0_RAD/.400X.200/L' has library errors. Unable to transfer to Allegro.
- R" `! T0 C' P& @( x( V- y% `5 U- ?/ Z8 C' R9 y1 Q
#6   ERROR(302) Device library error detected.
. m9 [3 Y$ p2 i) T- a* ~; g, L# J# ~* P) I1 k6 t3 d3 I! `# ^
Problems with device 'R_0_AX/.400X.100/.034_10K'. JEDEC_TYPE property 'AX/.400X.100/.034' is illegal: 'Package name is not legal.'.- d) P' ^7 D* i
; K2 |& ]% N7 D, S+ u2 D
Device 'R_0_AX/.400X.100/.034_10K' has library errors. Unable to transfer to Allegro.+ T" P. |' O; Z  z8 y8 [, x' I
  {3 T& L  c0 T4 h. O( p
#7   ERROR(302) Device library error detected.. v6 }: T1 D7 e0 d, [8 f3 d2 o

) Y6 v0 W7 S# g; C: i3 v$ J* o# UProblems with device '8 HEADER_0_SIP/TM/L.800/8_8 HEA'. JEDEC_TYPE property 'SIP/TM/L.800/8' is illegal: 'Package name is not legal.'.* X3 t. N2 x3 P3 G6 u' G6 ~
7 d: w! H! p. C7 q: {- G
Device '8 HEADER_0_SIP/TM/L.800/8_8 HEA' has library errors. Unable to transfer to Allegro.
+ f; }& B3 r9 b; m8 W, h) e6 z4 q: C3 X. K4 J
#8   ERROR(302) Device library error detected.
3 n! @* R3 o1 X2 \2 N3 ^$ z" q: j: m9 [& ]
Problems with device '4 HEADER_0_SIP/TM/L.400/4_4 HEA'. JEDEC_TYPE property 'SIP/TM/L.400/4' is illegal: 'Package name is not legal.'./ \- F# a6 I+ D3 l

* D0 H3 w3 i  V0 g. M! ]4 l6 ~Device '4 HEADER_0_SIP/TM/L.400/4_4 HEA' has library errors. Unable to transfer to Allegro.
6 Z" }/ e, j1 j0 [, X5 g; v: t
8 M& C6 j0 @; t4 K; b$ b* ]#9   ERROR(302) Device library error detected.
0 ?5 m. x0 {8 o. j6 y; V3 L- U+ e% v
& I5 A, N# E& {, R" WProblems with device 'CAP NP_1_RAD/.200X.100/LS.100/.'. JEDEC_TYPE property 'RAD/.200X.100/LS.100/.031' is illegal: 'Package name is not legal.'.; i- o# p( K3 m; i+ K4 w
# ~/ p+ i" ?/ T6 e3 u
Device 'CAP NP_1_RAD/.200X.100/LS.100/.' has library errors. Unable to transfer to Allegro." ~3 @: m) a- ~9 g
, ^' q  v+ W9 j( L5 V2 C! X- d
#10  ERROR(302) Device library error detected.
5 z0 U; \4 K* ~
4 ~! S7 A& e$ qProblems with device 'CAP NP_0_RAD/.200X.100/LS.100/.'. JEDEC_TYPE property 'RAD/.200X.100/LS.100/.031' is illegal: 'Package name is not legal.'.. T+ A5 E9 m/ S6 P( R
4 y) V5 K7 k0 E! T
Device 'CAP NP_0_RAD/.200X.100/LS.100/.' has library errors. Unable to transfer to Allegro.. t3 D! ]/ m1 e

4 n0 w3 ^3 {8 M+ V  o7 }6 C#11  ERROR(302) Device library error detected.
$ P& `; }% [) i* ^4 r6 d0 Y/ e- j4 w/ ]8 {6 }
Problems with device 'CAP_0_CPCYL1/D.300/LS.200/.034_'. JEDEC_TYPE property 'CPCYL1/D.300/LS.200/.034' is illegal: 'Package name is not legal.'.
" z, e5 c, T3 o# c1 c9 ~0 _/ J( j- |/ J/ A4 q( k: i- l
Device 'CAP_0_CPCYL1/D.300/LS.200/.034_' has library errors. Unable to transfer to Allegro.7 ?$ Z8 w- _" Y1 t$ F9 o
& T1 y' [, `! O8 K5 p
------ Summary Statistics ------
! G8 ^, G- o+ q; {% I* ^' n7 p4 ~% T5 r3 F1 E! ]

4 n2 L+ G, L, W0 Z$ h- t2 X" w. Z#12  ERROR(102) Run stopped because errors were detectedへ
7 Q1 ^% l% e( ?0 ?
6 ^- L: d3 |& _. C" C! Q% {2 ^4 R$ l; U- Q. W* A/ Y5 \
netrev run on Aug 29 17:10:17 2008
$ l% |4 A# Q' M! B   DESIGN NAME : 'YANLI2'
% w9 O! E( k7 R3 G2 f6 p   PACKAGING ON Apr  6 2004 19:58:389 Y/ `* p4 H) Z/ z. n! ^/ j
# u) `' Q8 P" K! U" X+ y
   COMPILE 'logic'+ P- X; ]1 }6 S7 ?% U$ Y9 p
   CHECK_PIN_NAMES OFF
, h% |: s" g7 H" V2 R$ }   CROSS_REFERENCE OFF
: {2 b, I' ]& Y1 q) V7 V$ u   FEEDBACK OFF/ W% @; Q5 _: f" g0 k/ q/ k
   INCREMENTAL OFF
. @; Y" [7 P2 z   INTERFACE_TYPE PHYSICAL
+ g' B% F( ]. N1 u, b8 }   MAX_ERRORS 500
; }+ c: `9 H5 b   MERGE_MINIMUM 5
9 t# y8 H5 Z$ l$ v$ A2 h- @   NET_NAME_CHARS '#%&()*+-./:=>?@[]^_`|'& C- Y# N/ \+ j6 i
   NET_NAME_LENGTH 24, D6 Y/ F/ y. Y, t
   OVERSIGHTS ON
* ~7 P' c7 n5 J  ?6 P1 Z1 y3 x1 k( V   REPLACE_CHECK OFF/ d1 |) m: u" a. z- c( L
   SINGLE_NODE_NETS ON
1 i! W/ p1 \' m! X   SPLIT_MINIMUM 0
3 M) H7 C) C5 [  `# Z. k   SUPPRESS   20) u3 @8 u6 V- D5 I7 M! r  ~; s0 F
   WARNINGS ON! Z+ M- F8 _" K% R+ x9 r% S

" o9 N. Z, q& H- @. L) g' J 12 errors detected
( R: Q5 P  Z. f8 X1 G" F No oversight detected: E8 h3 s# T0 m# b5 o
No warning detected: E+ G1 k/ Z2 ~* m6 \9 N! O" [

/ J. c' M3 X: Rcpu time      0:00:12. B0 d8 z/ s6 q: d- I
elapsed time  0:00:00, Y0 H! W+ @4 F$ X) F
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*** Done ***
3 P/ p' K9 W7 f: L
  \6 r2 J7 P* h********************************************************************************
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* Spawing Allegro
# |8 S1 N. j' ~! H# ]) x; A*; U/ Y8 H3 m% k2 B, E
********************************************************************************. m; }" W1 i9 e& U( }3 ^  [1 `
Spawing "C:\Cadence\SPB_15.2\tools\pcb\bin\allegro.exe" -mpssession Administrator "C:\wenjian1\allegro\yanli2.brd"
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, X# ?- n) L# S" I' r4 D# I*** Done ***
% h2 f% ^" m+ x- |怎么回事
作者: cuilei83    时间: 2008-8-29 17:25
标题: 文件如下 请高手再指点!!!
谢谢  orz

wenjian1.rar

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作者: chyp840527    时间: 2008-8-29 22:45
帖子不要发一大串,看的不爽,没心情帮你改错,同类型错误发一个就行了,把所有的错误都发出来,自己不分析一下就来问,那是对自己的不负责
作者: lihuizju    时间: 2008-8-30 00:24
'Package name is not legal.'.说得很清楚嘛,封装命名有问题,出现了非法字符。Allegro中的封装名不能出现“.”似乎“/”也是非法字符。唉,其他的就不说了。
作者: cuilei83    时间: 2008-8-30 10:38
标题: 刚开始学啊 有很多不是很明白
不好意思啊 我用的封装是layout 中的  是不是allegro 中的封装不能用layout中的???谢谢诶




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