标题: Cadence Hotfix_SPB16.60.011 (11号补丁)-2013-6-14 [打印本页] 作者: dsws 时间: 2013-6-16 15:39 标题: Cadence Hotfix_SPB16.60.011 (11号补丁)-2013-6-14 更新内容及模块： 7 F* b9 Z* Y; q0 {DATE: 06-14-2013 HOTFIX VERSION: 011 S R7 Z( B9 t: y
=================================================================================================================================== 2 v) e; S! `) L( S" g0 zCCRID PRODUCT PRODUCTLEVEL2 TITLE - k0 C- m* P/ y# p=================================================================================================================================== * @8 d0 l E$ y3 c6 h4 K982306 CONCEPT_HDL OTHER When plotting a PDF publisher output the page coming out half inch bigger in pdf ) h4 X5 ~6 C1 e I1055338 SIP_LAYOUT DRC_CONSTRAINTS Soldermask to Via drcs on bondfingers 0 M3 j) m; g/ h/ X6 \2 g. z1093375 ALLEGRO_EDITOR PLACEMENT Align Module with Zero spacing value space the modules further away the modules should be nearer / ^2 O0 r3 t9 F( V- {1103201 RF_PCB FE_IFF_IMPORT Wrong permissions to map file during IFF import' m# Y) D; t( r; B- w0 `- ^/ S
1106900 CONCEPT_HDL COMP_BROWSER Component Browser performance utility should honor CPM directives for include and exclude PPT6 @; c+ g; k' Z6 p
1110178 ALLEGRO_EDITOR EDIT_ETCH Line Width Retention should be controlled via setting$ ^! V4 |# a( [
1110323 APD DXF_IF DXF out is offsetting square discrete pads. - C6 }1 u* I+ a/ T1123581 ALLEGRO_EDITOR MANUFACT Dimension Line gets changed on board0 ?! s* y7 z7 A ~' `8 j
1134083 CONCEPT_HDL OTHER Published PDF file's hyperlinks do not work fine when user use double digits partitions for page Border.; i. C& U! B( d
1139338 ALLEGRO_EDITOR DRC_CONSTR The total etch length does not seem to work for Xnets after setting the variable "retain_electrical_constraints_on_nets" ' l. \& S5 L. u5 g; N1139361 ALLEGRO_EDITOR DRAFTING Angular dimension tolerance is incorrect when plus minus tolerances are equal. " t5 U* m& w$ ^% A1141882 ALLEGRO_EDITOR EDIT_ETCH Allegro Crashes during diffpair slide 1 S8 G6 q" |+ @- x! Q) h1142876 ALLEGRO_EDITOR SHAPE No DRC error when airgap between place bounds exactly zero+ I& `3 j( k8 r
1145235 CONCEPT_HDL CONSTRAINT_MGR DEHDL CM gives error when trying to launch SigXP " O9 {6 [0 P( U# D( n; F; z1145243 ALLEGRO_EDITOR NC Duplicate drills found in the NC Drill output: j3 }/ k2 y, m8 }$ f3 B: G) v
1145260 SIP_LAYOUT DIE_EDITOR Enable "Copy" in die editor 4 Y# B9 q( M4 d6 a) ^1145284 CONCEPT_HDL CORE Publish PDF crashes DE HDL& m" P A1 o# o& G* O2 S
1145333 ALLEGRO_EDITOR SHAPE SHAPE boundary may not cross itself. Error cannot be fixed. 5 c1 A( _) w9 r3 ^$ U1145856 ALLEGRO_EDITOR DRC_CONSTR DRC Line to Thru Pin appear while Fillet be added 1 S* ? o6 ~/ R1146287 PCB_LIBRARIAN CORE PDV expand pins and change origin sets coordinates for few pins wrong and places pins on top of each other after collaps + k* y7 }- X+ Q# L- M+ }1146865 ALLEGRO_EDITOR DATABASE Allegro crashes when trying to place mechanical symbol# d4 r; e7 \/ ~2 c
1148513 ALLEGRO_EDITOR OTHER Importing a subdrawing file causes incorrect net name assignment. $ f5 f' C; T. ?3 T+ u+ W9 p1148734 CONCEPT_HDL OTHER Logical Symbol Text is turned upside down after extracting PDF by Publish PDF " y: }; Z$ X- e$ m Z* M8 J1 l1149025 ALLEGRO_EDITOR INTERFACES IPC-2581 imports cross-hatched shapes as solid 0 H/ b, c4 V. ?( @9 ?1149948 APD OTHER Stream_out hangs on this design -- hang processing merge of overlapping shapes using poly_deletecolinear_only()0 X( }' \0 e+ Y6 r
1150274 CONCEPT_HDL CORE Uprev from 16.3 to 16.6 is not preserving RefDes / o! @1 Z+ T7 y9 [2 w1151450 SIP_LAYOUT DXF_IF DXF export from CDNSIP missing symbols; s5 `) v$ I; f9 f+ N% U; E
期待16.7.。。。。。。。。
