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标题: Allegro.cfg文件可以修改吗 [打印本页]

作者: francis    时间: 2011-4-1 14:33
标题: Allegro.cfg文件可以修改吗
[ComponentDefinitionProps]$ I1 Q  Y% X  a. H/ A
ALT_SYMBOLS=YES
" x4 e1 l5 X7 Z6 xCLASS=YES
/ A3 A2 U! ]. WPART_NUMBER=YES4 G* K& k( R4 |' e
TOL=YES& b/ O  G/ h& L1 `& [5 T% ]
VALUE=YES
& @$ Q/ t# {' O8 J1 ^7 r6 PPOWER_GROUP=YES
6 ~& l* {3 }1 n; ESWAP_INFO=YES: q9 _) m8 @# d4 p  w+ E& C
[ComponentInstanceProps]
% o9 L7 A% B' f4 U1 H# y$ o6 Q. `1 }GROUP=YES
- E/ i* G; Q* V0 {, t2 ?0 t$ gROOM=YES
9 i- e' J& o  Z% u6 X+ pVOLTAGE=YES" d% J; n$ L3 @/ M

5 v, q; J: V2 G[netprops]
! S& X# C4 m5 B4 VASSIGN_TOPOLOGY=YES5 d, c( g3 M" ~$ i/ O  r% H9 P
BUS_NAME=YES  g# i* [2 t; r) d4 \. g% m
CLOCK_NET=YES
9 Y) ]2 L$ g6 XDIFFERENTIAL_PAIR=YES% N6 V0 t7 m8 p% j* x# @: A% R
DIFFP_2ND_LENGTH=YES* v* t" y" }0 m. D
DIFFP_LENGTH_TOL=YES
2 O( U3 G( e9 @& }1 r/ \7 ZECL=YES
% R. l" R- Q2 P: b7 R/ AECL_TEMP=YES
# P9 t4 ~+ F  T2 K$ _ELECTRICAL_CONSTRAINT_SET=YES# W7 K" A+ }  Y( \! l4 \
EMC_CRITICAL_NET=YES' M9 |, Q2 H' h& H, X' u4 r; g: M
IMPEDANCE_RULE=YES& c. @8 I' l8 |
MATCHED_DELAY=YES2 p4 s& D! Y; \
MAX_EXPOSED_LENGTH=YES9 E4 v1 _3 w! \
MAX_FINAL_SETTLE=YES2 W7 H& [1 W# E, F( L: z  S( T; o
MAX_OVERSHOOT=YES( b8 H- E& @2 e) n6 X, b) O9 i* i4 U3 Z
MAX_VIA_COUNT=YES3 j* e" m' u5 _5 Z4 |
MIN_BOND_LENGTH=YES/ o! _# a5 n. ]( n! @( ~
MIN_HOLD=YES
) ^; @& Y, w9 a% e- S$ L% o  r/ {MIN_LINE_WIDTH=YES) I! w( ]$ `8 y. b! i- p
MIN_NECK_WIDTH=YES7 y4 f: E' ?0 j# Q/ M8 D& Y/ `
MIN_NOISE_MARGIN=YES
! q2 i5 @+ V8 P( w7 @( b0 {  n7 `MIN_SETUP=YES( {5 w7 ?3 Z. J) H, d( P
NET_PHYSICAL_TYPE=YES# @8 l, F" g( L. J
NET_SPACING_TYPE=YES! k& L4 Y, Y  n! J
NO_GLOSS=YES
6 V7 p& F7 z( F2 U8 i3 ZNO_PIN_ESCAPE=YES: s. P- C# ]% `9 T5 m5 g7 o
NO_RAT=YES
, U  P) _5 |3 d9 N6 cNO_RIPUP=YES5 \( s- S: ~. U/ i( t& g  f( O
NO_ROUTE=YES
* L7 y! a, x9 H& S! `9 ?) y. SNO_TEST=YES, @( ]+ [# o% P5 F7 z' Y4 K
PROBE_NUMBER=YES
+ m6 {# e: T" w8 [1 DPROPAGATION_DELAY=YES
9 t- Y0 A& c& s# ORELATIVE_PROPAGATION_DELAY=YES# X( l' [, N2 K4 J, w* z' E
RATSNEST_SCHEDULE=YES4 R. v) l6 p6 p$ i
ROUTE_PRIORITY=YES/ S6 c4 r" d1 C% e
SHIELD_NET=YES
5 Z8 P8 K1 y5 v' vSHIELD_TYPE=YES4 ~% l( j7 C/ |& Y- T
STUB_LENGTH=YES
, p6 h1 P) G) X/ [$ pSUBNET_NAME=YES# L9 [! G$ g3 |& @/ a* S
TS_ALLOWED=YES# y8 h+ p' n8 e
VOLTAGE=YES
- u- Y7 z' Y/ K8 bVOLTAGE_LAYER=YES
' h9 D( e6 R- t8 f[functionprops]; G4 o  ^8 x1 U8 A+ g2 h* g, A
GROUP=YES
5 {8 C9 W# `6 C8 x# ?; l# ?HARD_LOCATION=YES
# t- p: B1 S6 t6 I& `; CNO_SWAP_GATE=YES  w5 G6 K" b6 p3 X$ @# z0 Q
NO_SWAP_GATE_EXT=YES
+ {& V- ^6 P) U2 YNO_SWAP_PIN=YES: x2 b1 h  e  F; B. L
ROOM=YES3 @4 V* k. I5 ?  s% O( O8 n
[pinprops]& L, u: |5 X& R' t  w7 B0 C
NO_DRC=YES, `8 |) u& q9 D; }* N# z6 l5 N
NO_PIN_ESCAPE=YES
" e; C% G" v8 iNO_SHAPE_CONNECT=YES
9 K) H: q, z' s/ E1 I& b' {, Y1 ^NO_SWAP_PIN=YES9 c% ~" S6 i0 J1 k
PIN_ESCAPE=YES5 W: O, t8 W, h
$ G3 G- E% a% w0 w3 \

- ]  `8 R8 n# W" {: N' Y修改Allegro.cfg文件可以屏蔽导出网络表:非法字符的报错吗
6 X" W. a2 j$ W  b7 i& Q* Z
作者: francis    时间: 2011-4-1 14:49
针对非法字符问题,能否像处理相同device值一样,直接在环境变量中改,device  值ignore
/ {2 L1 u5 P1 t5 F2 h- x/ Z5 D% M
反过来看PADS对字符的要求就没有Cadence严格




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