标题: Power Integrity for I/O Interfaces:With SI/PI Co-Design [打印本页] 作者: drjiachen 时间: 2010-11-16 22:51 标题: Power Integrity for I/O Interfaces:With SI/PI Co-Design 本帖最后由 drjiachen 于 2010-11-16 23:06 编辑 8 `+ E$ k! n8 P1 p5 G4 S5 C
+ q. T+ e' Z* t0 d5 vPower Integrity for I/O Interfaces: With Signal Integrity/ Power Integrity Co-Design (Prentice Hall Modern Semiconductor Design Series' Sub Series: PH Signal Integrity Library) (Hardcover)Vishram S. Pandit (Author), Woong Hwan Ryu (Author), Myoung Joon Choi (Author) # k$ ?2 g9 W w, z; } ' Y& c! M, h' P+ F, [( c- D . B, s9 o/ C/ m/ L. H, dHardcover: 400 pages Publisher: Prentice Hall; 1 edition (August 16, 2010) Language: English ISBN-10: 0137011199 ISBN-13: 978-0137011193 1 V! E) [; ?' ]7 x0 QVishram S. Pandit, Senior Analog Engineer at Intel, specializes in high-speed system power delivery and on-chip power delivery. He holds an M.S.E.E. from University of Utah and an Advanced Certificate for Post Master's studies in Computer Science from Johns Hopkins. Dr. Myoung Joon Choi, Intel Staff Analog Engineer, focuses on signal and power integrity. He holds a Ph.D. from University of Illinois at Urbana-Champaign. Woong Hwan Ryu, Signal Integrity Manager at Intel, has led pre-silicon Signal Integrity and Power Integrity analysis for high speed interfaces. He holds a Ph.D. in Electrical Engineering from Korea Advanced Institute of Science and Technology. 2 ^% S2 k2 b; `' @( _ , U+ |" [( D( U& \4 H: `) \9 DTable of Contents " e8 T+ l s# x5 L+ {$ l
1. Input Output Interface0 R5 F$ O" u* L% W
2. Electromagnetic Effects # {5 U, [2 |) {! u3. Power/ Ground and Signal Distribution Network" O: G4 \8 a( f4 w$ w
4. Frequency Domain Analysis 8 x6 s7 W. @. a& j7 s' R5 o: f5. Time Domain Analysis3 B. a; I4 R- `1 w$ f
6: Signal Integrity/ Power Integrity Interaction 0 o9 N0 e: v; D! M7: Signal Integrity/ Power Integrity Co-Analysis; N! T3 m1 b4 w
8: Measurements: {- |9 v/ s2 R& ]0 o
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