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标题:
True-Hspice Device模型参考手册
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作者:
snowwolfe
时间:
2008-3-25 17:14
标题:
True-Hspice Device模型参考手册
Table of Contents
8 {# e9 t' ?8 k
Audience ............................................................................................. iii
& q @% G2 d$ m" k' x
Related Documents ............................................................................. iii
8 A, c0 Q, m5 K3 E
Conventions ........................................................................................ iv
+ |4 C: A- ^! S
Obtaining Customer Support .............................................................. vi
. G, s R0 [$ j& M, E. J
Other Sources of Information ............................................................ vii
4 i0 ^7 W& ~* z G6 X
Revision History ............................................................................... viii
% F1 }! U* |* W- s# n) }1 k$ F
Chapter 1 - Overview of Models ..................................................................... 1-1
5 b7 p& N2 Z; W5 G& l/ k, q
Using Models to Define Netlist Elements .............................................. 1-2
* o9 K7 R) e1 s
Supported Models for Specific Simulators ....................................... 1-2
2 w+ Y5 S" I! `6 C/ f
Selecting Models .............................................................................. 1-3
: F- @# Z- t+ t, G6 X: I
Example ............................................................................................ 1-3
6 h& O* m. B# U" Y: P
Chapter 2 - Using Passive Device Models....................................................... 2-1
' d% p0 g% T8 `2 j# G V
Resistor Device Model and Equations .................................................... 2-2
* F; Y, ?6 ^6 o$ G7 ?+ t8 \
Wire RC Model ................................................................................. 2-2
- G/ ~. {2 x2 z. |( ?5 a# ^
Resistor Model Equations ................................................................. 2-5
: Z8 [) M, b" n
Capacitor Device Model and Equations ............................................... 2-10
; S8 n4 w& w' b* y" f
Capacitance Model ......................................................................... 2-10
- Q4 r8 r/ j4 p' d
Capacitor Device Equations ........................................................... 2-11
( Q; V3 r# T& w B% X" V& @
Inductor Device Model and Equations ................................................. 2-14
7 ]6 y2 [) A; d+ m; H9 E* w
Inductor Core Models ..................................................................... 2-15
+ A! q6 \$ y- w* O8 B ]
Magnetic Core Element Outputs .................................................... 2-18
( ~, H8 }5 q: E- g% g
Inductor Device Equations ............................................................. 2-19
* G/ U' A9 E" `# X3 S) F" Q" B& i
Jiles-Atherton Ferromagnetic Core Model ..................................... 2-21
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Power Sources ....................................................................................... 2-30
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Independent Sources ....................................................................... 2-30
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Controlled Sources .......................................................................... 2-33
5 Z8 P& @% h5 E- L8 _* A
Chapter 3 - Using Diodes ................................................................................. 3-1
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Diode Types ............................................................................................ 3-2
% {: Y! [( S+ \$ }6 k
Using Diode Model Statements .............................................................. 3-3
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Setting Control Options .................................................................... 3-3
" @ S3 @% D- p& |- v7 d) T
Specifying Junction Diode Models ......................................................... 3-5
* [$ L6 \" b/ q' M- P& M' |( Q
Using the Junction Model Statement ................................................ 3-6
2 S( {) v9 \) K$ l+ w- g
Using Junction Model Parameters .................................................... 3-7
" O0 Z, W" ^$ I! k9 |
Geometric Scaling for Diode Models ............................................. 3-13
6 U( C; e6 G) D% N2 @* G
Defining Diode Models ................................................................... 3-15
) c3 \1 F# C- o
Determining Temperature Effects on Junction Diodes ................... 3-18
% S( W: A" d* O+ f
Using Junction Diode Equations ........................................................... 3-21
, n+ E/ l: O, }, k9 j
Using Junction DC Equations ......................................................... 3-22
% X' @5 C' {4 \# V$ i
Using Diode Capacitance Equations ............................................... 3-25
% | {& j0 }$ y( [1 K0 k
Using Noise Equations .................................................................... 3-27
9 u2 @" X2 e" H& c; a% K" U
Temperature Compensation Equations ........................................... 3-28
0 _" N- X4 L& Y7 Q- `# {
Using the Junction Cap Model .............................................................. 3-32
7 U+ x; }9 x1 B; {2 d+ W
Setting Juncap Model Parameters ................................................... 3-33
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Theory ............................................................................................. 3-33
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JUNCAP Model Equations ............................................................. 3-38
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Using the Fowler-Nordheim Diode ...................................................... 3-46
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Converting National Semiconductor Models ........................................ 3-48
! f# U1 X+ n. {2 o/ Y
Chapter 4 - Using BJT Models ........................................................................ 4-1
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Using BJT Models .................................................................................. 4-2
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Selecting Models ............................................................................... 4-2
$ a V' o& V5 h' O) G9 H; h
BJT Model Statement ............................................................................. 4-4
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Using BJT Basic Model Parameters ................................................. 4-5
# F" b" c& ^. q" y# C1 [2 i
Handling BJT Model Temperature Effects ..................................... 4-15
[2 Y( i1 q3 v" x; L1 G
BJT Device Equivalent Circuits ............................................................ 4-21
+ {7 T" A7 G- f. l$ Q' g9 b
Scaling ............................................................................................. 4-21
& K0 U2 G+ _. l5 s) L4 ~& B
Understanding the BJT Current Convention ................................... 4-21
9 A7 p$ I/ g; `. I5 _
Using BJT Equivalent Circuits ....................................................... 4-22
4 l6 y ^; \) W* u q; c$ c; Y
BJT Model Equations (NPN and PNP) ................................................. 4-30
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Understanding Transistor Geometry in Substrate Diodes .............. 4-30
# P' b* A3 i, @; a7 d
Using DC Model Equations ............................................................ 4-32
7 r/ U' m+ K/ d/ V( S% c b7 N1 c9 h
Using Substrate Current Equations ................................................. 4-33
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Using Base Charge Equations ......................................................... 4-34
7 t9 d' A" N* s3 ~6 I! F' E" j* h9 }
Using Variable Base Resistance Equations .................................... 4-35
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Using BJT Capacitance Equations ........................................................ 4-36
; H- j2 K4 \! S, `; P" z
Using Base-Emitter Capacitance Equations ................................... 4-36
4 q. ]' x: Y! Y8 E# V" D
Determining Base Collector Capacitance ....................................... 4-38
3 D* Z Q2 x. O
Using Substrate Capacitance ........................................................... 4-40
* }+ C2 J7 C9 j, j7 @% n, m
Defining BJT Noise Equations ............................................................. 4-42
/ J& P2 ]' d6 p/ R) r m5 ]
BJT Temperature Compensation Equations ......................................... 4-44
1 F' m [% e7 k" W' k3 ^) a! [7 C
Using Energy Gap Temperature Equations .................................... 4-44
1 L( p O6 N# d! {% U, b. B) k9 o! H% f
Saturation and Beta Temperature Equations, TLEV=0 or 2 ........... 4-44
5 E9 [! P) {% q
Using Saturation and Temperature Equations, TLEV=1 ................ 4-46
9 n" x" C1 x9 j+ j/ `& F
Using Saturation Temperature Equations, TLEV=3 ....................... 4-47
6 W0 r; w% a1 q4 ]" `# U
Using Capacitance Temperature Equations .................................... 4-49
0 T. Q% |# v% R7 R8 D
Parasitic Resistor Temperature Equations ...................................... 4-51
' [& h: C) e* h/ ?4 S4 g+ }# s
Using BJT Level=2 Temperature Equations .................................. 4-52
) Z7 b/ f3 {5 f# A, [
BJT Quasi-Saturation Model ................................................................ 4-53
/ L- ~5 ]# o& b/ s' k
Using Epitaxial Current Source Iepi ............................................... 4-55
5 a; ]; |& S+ _' C$ w, s4 T1 c
Epitaxial Charge Storage Elements Ci and Cx ............................... 4-55
) v' o7 s1 U+ G: I* L5 k5 C7 T8 ]
Converting National Semiconductor Models ........................................ 4-58
7 R: F8 g4 _+ _) Y) D6 Y
VBIC Bipolar Transistor Model ........................................................... 4-60
3 w& X W/ {# V9 Z: G- B2 `- ^
Understanding the History of VBIC ............................................... 4-60
$ z: w8 A& P% m( y y9 t6 ^, B, z
VBIC Parameters ............................................................................ 4-61
- r9 l: X* i3 A7 g2 g c
Noise Analysis ................................................................................ 4-62
) O- k3 Z+ Y) }' F3 C5 O$ K
Level 6 Philips Bipolar Model (MEXTRAM Level 503) ..................... 4-71
* C! q |! t H; p8 B
Level 6 Element Syntax .................................................................. 4-71
; O I/ C/ \, O# x$ G3 ?- W( ?' N7 I
Level 6 Model Parameters .............................................................. 4-72
2 k6 F- ?; C; D. t9 s
Level 6 Philips Bipolar Model (MEXTRAM Level 504) ..................... 4-78
1 W+ d; y6 R$ I: a7 w+ t
Notes ............................................................................................... 4-79
8 q" R l. c5 i8 H" [1 G
Level 6 Model Parameters (504) ..................................................... 4-80
8 c" U! B4 q( `) ?2 P
Level 8 HiCUM Model ......................................................................... 4-94
8 P* E5 W, m3 K8 d6 b* {
What is the HiCUM Model? ........................................................... 4-94
# k# ~9 f9 z2 c) ]+ Q* J& G }
HiCUM Model Advantages ............................................................ 4-94
+ h( h9 h! j7 V
Avant! HiCUM Model vs. Public HiCUM Model .......................... 4-96
: ]9 R2 ]* T, k" y
Model Implementation .................................................................... 4-96
" M) l! E/ i7 Q ]& R6 g
Internal Transistors ......................................................................... 4-97
1 Q2 F- i: d8 N4 A# R" {; U
Level 9 VBIC99 Model ...................................................................... 4-110
! a2 K4 M) d' R( s8 i
Element Syntax of BJT Level 9 .................................................... 4-110
/ h& e: V3 R' c- z" N" N. p3 ^
Effects of VBIC99 ........................................................................ 4-112
2 S/ J, O5 P! U% c
Model Implementation .................................................................. 4-112
; y$ N9 J7 k0 c8 r5 k
Example ........................................................................................ 4-119
5 z3 A# m6 u2 d$ \7 V4 p
VBIC99 Notes for HSPICE Users ................................................ 4-123
2 h4 x7 ~. ^! `# O7 d" ^9 `0 o* V
Level 10 Phillips MODELLA Bipolar Model .................................... 4-124
8 q+ E$ S4 ]9 U
Model Parameters ......................................................................... 4-124
% v0 n4 u2 g* I3 H
Equivalent Circuits ........................................................................ 4-129
) L! ~ t* b+ c2 g* o
DC Operating Point Output .......................................................... 4-131
3 z4 R) h, o4 H
Model Equations ........................................................................... 4-132
5 Y$ b0 w6 U t9 s, F) Z% ?7 D5 K! F3 ~
Temperature Dependence of the Parameters ................................ 4-142
; O0 J5 G2 ^2 a3 K! ]
Level 11 UCSD HBT Model .............................................................. 4-146
4 `9 |- Z0 R9 m# f
Using the UCSD HBT Model ....................................................... 4-146
) H- q. x8 J8 h1 O9 V
Description of Parameters ............................................................. 4-147
5 e. I5 s$ ]! W7 ]9 F# c* o& F
Model Equations ........................................................................... 4-152
/ ^; y, n9 g' U$ I$ z; S8 Q+ n
Equivalent Circuit ......................................................................... 4-163
+ r4 e# a' J: v
Example Avant! True-Hspice Model Statement ........................... 4-165
- F$ ~4 B3 F) |4 [7 l; R
Chapter 5 - Using JFET and MESFET Models............................................. 5-1
& ^9 {8 ?# R* h$ o: H' ~' N: U
Understanding JFETs .............................................................................. 5-2
+ I J, G/ ^) ?- m) r* u4 G0 \
Specifying a Model ................................................................................. 5-3
: c" g* J- ]0 a
Understanding the Capacitor Model ....................................................... 5-5
- o0 Y7 O H1 ?$ P, h+ V
Model Applications ........................................................................... 5-5
# g- ~ ?3 d2 R z y" s3 h( l) G
Control Options ................................................................................. 5-6
h& c9 G3 s% h
JFET and MESFET Equivalent Circuits ................................................. 5-7
: m3 Y, ?; \! x4 H: e
Scaling ............................................................................................... 5-7
: }0 y' b, \# m6 Y5 f, M0 b
Understanding JFET Current Convention ........................................ 5-7
& ~. a- k3 v; @/ x3 W
JFET Equivalent Circuits .................................................................. 5-8
; S1 X: k b% g- s* A/ ^0 X9 B
JFET and MESFET Model Statements ................................................. 5-13
# E1 ^9 \$ A: c+ V9 j9 n3 w8 M
JFET and MESFET Model Parameters ........................................... 5-13
( G) W% b; _# A) M1 I
Gate Diode DC Parameters ............................................................. 5-15
4 n6 [& v# f; U! C2 j
JFET and MESFET Capacitances ................................................... 5-25
% H9 B' j7 D* ~6 f( v+ s- {( t
Capacitance Comparison (CAPOP=1 and CAPOP=2) ................... 5-29
) c+ p9 ~ M% h8 U* h
JFET and MESFET DC Equations ................................................. 5-31
4 H( F" w& s' [9 A) T* @" g
JFET and MESFET Noise Models ....................................................... 5-35
& l& z1 B) r2 ]3 I0 Y. T/ l! K; F
Noise Parameters ........................................................................... 5-35
& o. _4 E' I4 N) p8 s! x
Noise Equations .............................................................................. 5-35
6 y+ A3 J$ [3 f9 s
Noise Summary Printout Definitions .............................................. 5-36
# g8 y; w% e5 [* S, X
JFET and MESFET Temperature Equations ........................................ 5-37
C5 x% {% N7 Z1 ]1 ?& G6 W
Temperature Compensation Equations ........................................... 5-40
' `7 [: _) b( i M" M
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作者:
soda2010
时间:
2008-8-21 22:17
xiexiele
作者:
superfect
时间:
2008-11-6 21:01
好 啊。感谢啊
作者:
winstonguo
时间:
2009-4-18 17:20
感激!
作者:
muzi820305
时间:
2009-12-25 15:03
谢谢,学习中
作者:
kyang74
时间:
2010-1-30 15:13
谢谢~
作者:
pzh2006
时间:
2010-3-5 15:25
好东西
作者:
andy.wei
时间:
2012-6-5 20:36
谢谢分享
作者:
zl0721
时间:
2012-7-6 14:47
kan kan
作者:
Colin_Zhou
时间:
2012-8-8 16:18
thanks a lot ,very good materials
作者:
ssping
时间:
2012-10-14 16:39
先下了,谢谢!努力学习
作者:
shuaiwang
时间:
2015-4-16 22:26
谢谢
作者:
灯火枫桥
时间:
2015-4-18 17:03
谢谢啊!
作者:
狂想的旅程
时间:
2018-1-28 23:03
xiexie lou zhu
作者:
狂想的旅程
时间:
2018-1-28 23:06
好资料
作者:
Justinkunt
时间:
2018-3-16 21:55
支持,頂一個
作者:
claptrap
时间:
2018-3-29 09:43
谢谢~
作者:
helicopter
时间:
2018-4-8 10:59
谢谢分享
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