EDA365电子工程师网

标题: 我想检查一下开发板io口的输入输出功能是否正常,应该如何做？ [打印本页]

作者: mengzhuhao 时间: 2009-3-2 16:18
标题: 我想检查一下开发板io口的输入输出功能是否正常,应该如何做？
我想检查一下开发板io口的输入输出功能是否正常,应该如何做？
为何按照下面写的不太对？

我的思路是：

设置一个计数器，20位
将每一位输出到对应的io口
io口在作为输入
通过一个触发器保持这个值

想通过嵌入式逻辑分析器看看输出输入的波形

但综合后
作为输入的触发器没有没在逻辑分析器里面显示出来

应该如何写才正确？

`timescale 1ns / 1ps
module EP2S60F1020C5ES(
      i_Clock,
      i_Reset_n,
      io_CON1_B,
      io_CON1_C,
      io_CON1_D,
      io_CON1_E,
      io_CON1_F,
      //
      io_CON2_B,
      io_CON2_C,
      io_CON2_D,
      io_CON2_E,
      io_CON2_F,
      //
      i_CON1_D2,
      i_CON1_D3,
      i_CON1_F18,
      i_CON1_F19,
      i_CON2_B10,
      i_CON2_B11,
      data
      );
      //
      input       i_Clock;
      input       i_Reset_n;
      inout [19:0] io_CON1_B;
      inout [19:0] io_CON1_C;
      inout [19:0] io_CON1_D;
      inout [19:0] io_CON1_E;
      inout [19:0] io_CON1_F;
      inout [19:0] io_CON2_B;
      inout [19:0] io_CON2_C;
      inout [19:0] io_CON2_D;
      inout [19:0] io_CON2_E;
      inout [19:0] io_CON2_F;
      //
      input       i_CON1_D2;
      input       i_CON1_D3;
      input       i_CON1_F18;
      input       i_CON1_F19;
      input       i_CON2_B10;
      input       i_CON2_B11;
      output data;
      reg CNT_CON1_D2;
      always @(posedge i_Clock or negedge i_Reset_n)
            if(~i_Reset_n)
                     CNT_CON1_D2<=0;
            else
                     CNT_CON1_D2<=i_CON1_D2;

      //----------------------------------------------------------------

      reg [9:0] CNT;

      always @(posedge i_Clock or negedge i_Reset_n)
            if(~i_Reset_n)
                     CNT<=0;
            else
                     CNT<=CNT+1;
      //
      assign  io_CON1_B    [0]    =DAO_CON1_B0;
      assign  io_CON1_B    [1]    =DAO_CON1_B1;
      assign  io_CON1_B    [2]    =DAO_CON1_B2;
      assign  io_CON1_B    [3]    =DAO_CON1_B3;
      assign  io_CON1_B    [4]    =DAO_CON1_B4;
      assign  io_CON1_B    [5]    =DAO_CON1_B5;
      assign  io_CON1_B    [6]    =DAO_CON1_B6;
      assign  io_CON1_B    [7]    =DAO_CON1_B7;
      assign  io_CON1_B    [8]    =DAO_CON1_B8;
      assign  io_CON1_B    [9]    =DAO_CON1_B9;
      assign  io_CON1_B    [10] =DAO_CON1_B10;
      assign  io_CON1_B    [11] =DAO_CON1_B11;
      assign  io_CON1_B    [12] =DAO_CON1_B12;
      assign  io_CON1_B    [13] =DAO_CON1_B13;
      assign  io_CON1_B    [14] =DAO_CON1_B14;
      assign  io_CON1_B    [15] =DAO_CON1_B15;
      assign  io_CON1_B    [16] =DAO_CON1_B16;
      assign  io_CON1_B    [17] =DAO_CON1_B17;
      assign  io_CON1_B    [18] =DAO_CON1_B18;
      assign  io_CON1_B    [19] =DAO_CON1_B19;
      assign  CON1_B0       =io_CON1_B[0];
      assign  CON1_B1       =io_CON1_B[1];
      assign  CON1_B2       =io_CON1_B[2];
      assign  CON1_B3       =io_CON1_B[3];
      assign  CON1_B4       =io_CON1_B[4];
      assign  CON1_B5       =io_CON1_B[5];
      assign  CON1_B6       =io_CON1_B[6];
      assign  CON1_B7       =io_CON1_B[7];
      assign  CON1_B8       =io_CON1_B[8];
      assign  CON1_B9       =io_CON1_B[9];
      assign  CON1_B10             =io_CON1_B[10];
      assign  CON1_B11             =io_CON1_B[11];
      assign  CON1_B12             =io_CON1_B[12];
      assign  CON1_B13             =io_CON1_B[13];
      assign  CON1_B14             =io_CON1_B[14];
      assign  CON1_B15             =io_CON1_B[15];
      assign  CON1_B16             =io_CON1_B[16];
      assign  CON1_B17             =io_CON1_B[17];
      assign  CON1_B18             =io_CON1_B[18];
      assign  CON1_B19             =io_CON1_B[19];
      reg                   DAO_CON1_B0;
      reg                   DAO_CON1_B1;
      reg                   DAO_CON1_B2;
      reg                   DAO_CON1_B3;
      reg                   DAO_CON1_B4;
      reg                   DAO_CON1_B5;
      reg                   DAO_CON1_B6;
      reg                   DAO_CON1_B7;
      reg                   DAO_CON1_B8;
      reg                   DAO_CON1_B9;
      reg                   DAO_CON1_B10;
      reg                   DAO_CON1_B11;
      reg                   DAO_CON1_B12;
      reg                   DAO_CON1_B13;
      reg                   DAO_CON1_B14;
      reg                   DAO_CON1_B15;
      reg                   DAO_CON1_B16;
      reg                   DAO_CON1_B17;
      reg                   DAO_CON1_B18;
      reg                   DAO_CON1_B19;
      reg                   DAI_CON1_B0;
      reg                   DAI_CON1_B1;
      reg                   DAI_CON1_B2;
      reg                   DAI_CON1_B3;
      reg                   DAI_CON1_B4;
      reg                   DAI_CON1_B5;
      reg                   DAI_CON1_B6;
      reg                   DAI_CON1_B7;
      reg                   DAI_CON1_B8;
      reg                   DAI_CON1_B9;
      reg                   DAI_CON1_B10;
      reg                   DAI_CON1_B11;
      reg                   DAI_CON1_B12;
      reg                   DAI_CON1_B13;
      reg                   DAI_CON1_B14;
      reg                   DAI_CON1_B15;
      reg                   DAI_CON1_B16;
      reg                   DAI_CON1_B17;
      reg                   DAI_CON1_B18;
      reg                   DAI_CON1_B19;

      //----------------------------------------------------------------
      always @(posedge i_Clock or negedge i_Reset_n)
            if(~i_Reset_n)begin
                              DAO_CON1_B0    <=0;
                              DAO_CON1_B1    <=0;
                              DAO_CON1_B2    <=0;
                              DAO_CON1_B3    <=0;
                              DAO_CON1_B4    <=0;
                              DAO_CON1_B5    <=0;
                              DAO_CON1_B6    <=0;
                              DAO_CON1_B7    <=0;
                              DAO_CON1_B8    <=0;
                              DAO_CON1_B9    <=0;
                              DAO_CON1_B10 <=0;
                              DAO_CON1_B11 <=0;
                              DAO_CON1_B12 <=0;
                              DAO_CON1_B13 <=0;
                              DAO_CON1_B14 <=0;
                              DAO_CON1_B15 <=0;
                              DAO_CON1_B16 <=0;
                              DAO_CON1_B17 <=0;
                              DAO_CON1_B18 <=0;
                              DAO_CON1_B19 <=0;
                     end
            else begin
                              DAO_CON1_B0    <=CNT[0];
                              DAO_CON1_B1    <=CNT[1];
                              DAO_CON1_B2    <=CNT[2];
                              DAO_CON1_B3    <=CNT[3];
                              DAO_CON1_B4    <=CNT[4];
                              DAO_CON1_B5    <=CNT[5];
                              DAO_CON1_B6    <=CNT[6];
                              DAO_CON1_B7    <=CNT[7];
                              DAO_CON1_B8    <=CNT[8];
                              DAO_CON1_B9    <=CNT[9];
                              DAO_CON1_B10 <=CNT[0];
                              DAO_CON1_B11 <=CNT[1];
                              DAO_CON1_B12 <=CNT[2];
                              DAO_CON1_B13 <=CNT[3];
                              DAO_CON1_B14 <=CNT[4];
                              DAO_CON1_B15 <=CNT[5];
                              DAO_CON1_B16 <=CNT[6];
                              DAO_CON1_B17 <=CNT[7];
                              DAO_CON1_B18 <=CNT[8];
                              DAO_CON1_B19 <=CNT[9];
                     end
      always @(posedge i_Clock or negedge i_Reset_n)
            if(~i_Reset_n)begin
                              DAI_CON1_B0    <=0;
                              DAI_CON1_B1    <=0;
                              DAI_CON1_B2    <=0;
                              DAI_CON1_B3    <=0;
                              DAI_CON1_B4    <=0;
                              DAI_CON1_B5    <=0;
                              DAI_CON1_B6    <=0;
                              DAI_CON1_B7    <=0;
                              DAI_CON1_B8    <=0;
                              DAI_CON1_B9    <=0;
                              DAI_CON1_B10 <=0;
                              DAI_CON1_B11 <=0;
                              DAI_CON1_B12 <=0;
                              DAI_CON1_B13 <=0;
                              DAI_CON1_B14 <=0;
                              DAI_CON1_B15 <=0;
                              DAI_CON1_B16 <=0;
                              DAI_CON1_B17 <=0;
                              DAI_CON1_B18 <=0;
                              DAI_CON1_B19 <=0;
                     end
            else begin
                              DAI_CON1_B0    <=CON1_B0;
                              DAI_CON1_B1    <=CON1_B1;
                              DAI_CON1_B2    <=CON1_B2;
                              DAI_CON1_B3    <=CON1_B3;
                              DAI_CON1_B4    <=CON1_B4;
                              DAI_CON1_B5    <=CON1_B5;
                              DAI_CON1_B6    <=CON1_B6;
                              DAI_CON1_B7    <=CON1_B7;
                              DAI_CON1_B8    <=CON1_B8;
                              DAI_CON1_B9    <=CON1_B9;
                              DAI_CON1_B10 <=CON1_B10;
                              DAI_CON1_B11 <=CON1_B11;
                              DAI_CON1_B12 <=CON1_B12;
                              DAI_CON1_B13 <=CON1_B13;
                              DAI_CON1_B14 <=CON1_B14;
                              DAI_CON1_B15 <=CON1_B15;
                              DAI_CON1_B16 <=CON1_B16;
                              DAI_CON1_B17 <=CON1_B17;
                              DAI_CON1_B18 <=CON1_B18;
                              DAI_CON1_B19 <=CON1_B19;
                     end
                     ........................
endmodule

作者: mengzhuhao 时间: 2009-3-2 16:24
我想吧输出的值直接通过d触发器再反馈回来
想通过嵌入式逻辑分析器直接看看d触发器的输出波形

这样就只能这个io是可输出也可输入了

因为管脚非常多需要检查验证一下

这些座都是pin插座

如果单独检查输出还好点
直接输出分频波形就可以了
作为输入检查就费劲了不少

不知道有啥好的方法

我上面写的代码应该如何修改一下就能实现我的目的呢？

作者: kellerman 时间: 2009-3-4 10:38
至于这么麻烦吗？把时钟直接通到io上看看输出是否正常。

欢迎光临 EDA365电子工程师网 (https://bbs.elecnest.cn/)