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标题: 下载到开发板上遇到一个与仿真不同的问题：波形不一致！ [打印本页]
作者: mengzhuhao 时间: 2009-2-25 10:23
标题: 下载到开发板上遇到一个与仿真不同的问题：波形不一致！
下载到开发板上遇到一个与仿真不同的问题：波形不一致！
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Z, x U5 w1 R4 _( F# c5 D+ K, l, w我用嵌入式分析仪抓数据发现波形与我仿真时的波形不一致0 l$ U9 ?3 V r f9 x! F
比较奇怪
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( X2 C. i# y1 j& V我的设计思路是通过串口接受数据* p C. b z9 C( Q
然后把接收的数据写入sram器件里面去
/ R) U: G# |3 H7 o3 {& `
7 Y' E/ w s! @3 |+ K. w( o" P但发现那个控制信号与仿真时不一致（见附图所示）
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; T' c4 v$ U- g8 t G$ [: v
8 I7 h0 X9 G" S3 D跟sram接口相关的代码如下：
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& H! N7 A2 ~" r n T) P8 a7 G-----------------------------------------------------------------------------------------
always @(posedge i_Clock or negedge i_Reset_n)- K; o3 I! P3 A7 ?
if(~i_Reset_n)begin 5 ?& h1 B1 }' r$ U z6 W2 I
SRAM_STATE<=`SRAM_IDLE;( B& ?0 s* N9 R/ y, Q
Write_ack<=0;
+ U, b3 O. f; F7 J( R) k5 e Read_ack<=0;6 g1 `9 h0 X1 I+ Y0 c* K) s+ y
end
8 M! [6 V: Y$ @& _$ W) R else begin/ t! N' D, k- y; |
Write_ack<=0;
* x0 d# v( \4 d6 e Read_ack<=0;8 L# o# P2 R2 J
case (SRAM_STATE)' s* H. C/ n f
`SRAM_IDLE:begin3 c8 _% V6 z. l! B; r4 U6 [
Write_ack<=0;
$ ~' e. U! i; J0 S H Read_ack<=0;
! _+ E( B9 n+ `2 s2 U case({Write_req,Read_req})
, w1 ?% P3 s9 ^- P 2'b10:begin( H8 ]: |) f7 u# N2 Y* W
SRAM_STATE<=`SRAM_WRITE; 1 E7 r Z4 V& E( w4 a$ `2 v, J
Write_ack<=1;' u; K. C O4 z4 a
end
0 e2 `- k! ^& T! t 2'b01:begin " [. S) S+ N) u: ]9 c3 d
SRAM_STATE<=`SRAM_READ;
/ N/ p( V: ]1 W! H, h, @4 v( P end
/ A( y+ F# z, T! Z default:SRAM_STATE<=`SRAM_IDLE;: j; p. K+ N% y
endcase2 g* Z8 a' t E4 w9 G6 z
end
0 [' i0 x+ T9 \* _ `SRAM_WRITE:begin
, l5 D7 t4 [+ D G7 g' @1 `! d; g SRAM_STATE<=`SRAM_IDLE;
6 {) e( Y4 n7 Y& K$ C end8 T" _% a+ h- W
`SRAM_READ:begin
, b, L* K+ H1 S* e SRAM_STATE<=`SRAM_READ_KEEP;% D: _* R" Z0 H% s4 V
end
4 I |5 Q$ B/ R' ~, H `SRAM_READ_KEEP:begin
; x) d6 v; l5 x& N: \8 y5 s6 v- L SRAM_STATE<=`SRAM_IDLE; ( y& b" i! b7 Q/ D% g$ u9 E
Read_ack<=1;
6 H, S, s; z$ T' ~* S6 d/ L$ V end
# f) r7 p! [* D' p( M default:begin ( t1 Q* T8 o% ^0 ]; @6 S& I- p
SRAM_STATE<=`SRAM_IDLE;5 F t: e3 h7 T9 M, v
Write_ack<=0;% K7 m* v. S1 ~
Read_ack<=0;
4 H+ I9 T. s' g/ d( o5 p* ` end
, L5 T# g, P* |$ U5 x: b3 }5 k3 O endcase+ L; R/ M* ]2 V+ p
end
-----------------------------------------------------------------------------------------
assign io_Sram_data =(o_Sram_OE_n) ? Sys_dataout:{16{1'bz}};
3 K0 [$ r. B# ]* F& |3 g assign Sys_datain = io_Sram_data;
- U# o0 @4 n$ F& ^! |# A //
0 \" @6 w: _ \ always @(posedge i_Clock or negedge i_Reset_n)7 i+ B& |- y, W2 ?+ _
if(~i_Reset_n)begin& [4 `. N6 Z4 v% K( g0 \. d9 o
o_Sram_CE_n<=1;) I" M" @! H( `8 u; X6 R1 b
o_Sram_WE_n<=1;
; U4 O7 r& D$ e$ Z1 { o_Sram_OE_n<=1;
& f" z; y2 I: L t' e8 ]! D6 p o_Sram_UB_n<=1;$ v* C1 K6 Q% U6 l- b5 W* R' ?
o_Sram_LB_n<=1; - I4 f* @1 C5 @) D# o
o_Sram_add<={16{1'b0}};
" S) p0 g( V8 B! L end; L" B( l( X3 [1 ?, r
else begin( |6 [" B5 P% K& @' a$ s# D
case(SRAM_STATE)) g; C2 M0 Q3 _9 }; w
`SRAM_IDLE:begin, T4 o( H3 p0 \0 k! {- ?
o_Sram_CE_n<=1;( ]9 o. K' s+ O8 c1 L3 s4 h: n
o_Sram_WE_n<=1;
5 ? Q! a+ t$ s( x# ~) y o_Sram_OE_n<=1;
7 [2 V- t2 A5 z) W o_Sram_UB_n<=1;6 t6 k$ _# }* V; T: I5 |* x2 D5 m& I! V
o_Sram_LB_n<=1;
) L1 D. @+ _9 a$ K' i( g" g o_Sram_add<=Sys_ADDR;
T- O2 X- f) t2 z end
3 w* W3 q# f! W# O( M ~) D `SRAM_WRITE:begin
# h9 G0 `- d& k( U o_Sram_CE_n<=0;& `. [$ Z, t' k
o_Sram_WE_n<=0;; e- w% N L0 v3 o d, [+ {
o_Sram_OE_n<=1;/ N3 V! H) i8 ]$ k9 W2 G
o_Sram_UB_n<=0;
2 B8 Q1 f$ h/ h4 \: t o_Sram_LB_n<=0; : e0 I8 k' \* ~# z
o_Sram_add<=Sys_ADDR;
" C( A7 z; A6 W$ b end
" Z9 s" X7 h* ~; c `SRAM_READ,6 g G5 \5 J5 Y, a! C
`SRAM_READ_KEEP:begin
+ K+ B" w `, |) ~5 Z4 \ o_Sram_CE_n<=0;
\ p0 Q& N8 z9 p) N/ x o_Sram_WE_n<=1;
# W6 C `7 d/ x& E. X9 R* @2 I/ _ o_Sram_OE_n<=0;) A8 {: r* m/ j" T: l7 \
o_Sram_UB_n<=0;7 y3 u, f$ T b
o_Sram_LB_n<=0;
$ E0 k9 D+ X6 k" K# z o_Sram_add<=Sys_ADDR;
! x ]& W* _* ~5 M2 X5 V' e end
" Q3 C5 f! z( m. _2 S% S* G default:begin
% \1 l. y6 q- o4 z! q o_Sram_CE_n<=1;2 J6 X, ?4 |7 z0 N$ H( m$ @: }' q
o_Sram_WE_n<=1;/ B. f0 A% [8 {, u2 Q! v/ w- T
o_Sram_OE_n<=1;
5 |4 G/ V2 A& o1 x3 ?* v; A o_Sram_UB_n<=1;$ R: r# K) L" t; \" E
o_Sram_LB_n<=1;
( V; A+ I* T q- Y o_Sram_add<=Sys_ADDR;
3 j3 _* t( O( H. K& y; ? end
# K3 v: s0 J9 u! O9 A9 e endcase9 p2 o, f$ \9 @: B
end
-----------------------------------------------------------------------------------------
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作者: mengzhuhao 时间: 2009-2-25 10:26
而且也发现o_TX的波形也是与仿真时的波形时反向来着
作者: inspiron1501 时间: 2009-2-25 11:48
你的时钟是多少？仿真是前仿真还是后仿真，综合时加约束了吗
作者: mengzhuhao 时间: 2009-2-28 10:34
我单独用uart发送模块给pc传数据 可以正常通过串口调试工具收到数据 1 @% |4 f! M; R- u2 q
例如我发1234 可以收到这个数据$ w( D# j' ?/ F) M, }% b) i6 z: H
& Q# u; N4 ?0 ]7 c+ N7 z+ V我在看报告的时候发现这样的提示:! j/ i+ ~3 y' P! j3 Q& |5 s9 I
Warning: Reduced register "CRT2SRAM_DATAPATH:CRT2SRAM_DATAPATH|Write_req" with stuck data_in port to stuck value GND4 B. ]( F8 \" i& \
Warning: Reduced register "CRT2SRAM_DATAPATH:CRT2SRAM_DATAPATH|SRAM_Sys_dataout[15]" with stuck data_in port to stuck value GND/ p: L$ z O5 W; m5 _; p
Warning: Reduced register "CRT2SRAM_DATAPATH:CRT2SRAM_DATAPATH|SRAM_Sys_dataout[14]" with stuck data_in port to stuck value GND& W2 x, [$ A+ g
Warning: Reduced register "CRT2SRAM_DATAPATH:CRT2SRAM_DATAPATH|SRAM_Sys_dataout[13]" with stuck data_in port to stuck value GND
1 ?% ^) J1 Z; i3 Q2 ?' _; vWarning: Reduced register "CRT2SRAM_DATAPATH:CRT2SRAM_DATAPATH|SRAM_Sys_dataout[12]" with stuck data_in port to stuck value GND
: Q: J% d: t: r$ tWarning: Reduced register "CRT2SRAM_DATAPATH:CRT2SRAM_DATAPATH|SRAM_Sys_dataout[11]" with stuck data_in port to stuck value GND4 X: O0 p8 \# `: p
Warning: Reduced register "CRT2SRAM_DATAPATH:CRT2SRAM_DATAPATH|SRAM_Sys_dataout[10]" with stuck data_in port to stuck value GND6 j" g5 }% ~1 J8 }
Warning: Reduced register "CRT2SRAM_DATAPATH:CRT2SRAM_DATAPATH|SRAM_Sys_dataout[9]" with stuck data_in port to stuck value GND
' o8 _( q# I8 {Warning: Reduced register "CRT2SRAM_DATAPATH:CRT2SRAM_DATAPATH|SRAM_Sys_dataout[8]" with stuck data_in port to stuck value GND
. }- {9 {+ ~$ YWarning: Reduced register "CRT2SRAM_DATAPATH:CRT2SRAM_DATAPATH|SRAM_Sys_dataout[7]" with stuck data_in port to stuck value GND8 d' U% g" f. N$ U7 m! e
Warning: Reduced register "CRT2SRAM_DATAPATH:CRT2SRAM_DATAPATH|SRAM_Sys_dataout[6]" with stuck data_in port to stuck value GND; b+ B" N- }8 D3 U; x; `3 Z! n
Warning: Reduced register "CRT2SRAM_DATAPATH:CRT2SRAM_DATAPATH|SRAM_Sys_dataout[5]" with stuck data_in port to stuck value GND$ C, h8 p) W& t% T( G/ s
Warning: Reduced register "CRT2SRAM_DATAPATH:CRT2SRAM_DATAPATH|SRAM_Sys_dataout[4]" with stuck data_in port to stuck value GND1 n: }7 d6 _2 @# w( c) N# m
Warning: Reduced register "CRT2SRAM_DATAPATH:CRT2SRAM_DATAPATH|SRAM_Sys_dataout[3]" with stuck data_in port to stuck value GND
; \+ ]2 Z" d9 G+ \1 ~Warning: Reduced register "CRT2SRAM_DATAPATH:CRT2SRAM_DATAPATH|SRAM_Sys_dataout[2]" with stuck data_in port to stuck value GND' K" X! d: {0 v4 p& \
Warning: Reduced register "CRT2SRAM_DATAPATH:CRT2SRAM_DATAPATH|SRAM_Sys_dataout[1]" with stuck data_in port to stuck value GND
$ G, B) I) V2 q+ jWarning: Reduced register "CRT2SRAM_DATAPATH:CRT2SRAM_DATAPATH|SRAM_Sys_dataout[0]" with stuck data_in port to stuck value GND
/ j3 _9 t# L6 f0 CWarning: Reduced register "CRT2SRAM_DATAPATH:CRT2SRAM_DATAPATH|UART_Sys_dataout[15]" with stuck data_in port to stuck value GND
( K/ x: f0 ~ A! [+ ~" F YWarning: Reduced register "CRT2SRAM_DATAPATH:CRT2SRAM_DATAPATH|UART_Sys_dataout[14]" with stuck data_in port to stuck value GND
. s0 ^- p- L5 bWarning: Reduced register "CRT2SRAM_DATAPATH:CRT2SRAM_DATAPATH|UART_Sys_dataout[13]" with stuck data_in port to stuck value GND
, ] n6 r# E7 U5 f3 NWarning: Reduced register "CRT2SRAM_DATAPATH:CRT2SRAM_DATAPATH|UART_Sys_dataout[12]" with stuck data_in port to stuck value GND
# e6 v8 Y. t; q1 }. {Warning: Reduced register "CRT2SRAM_DATAPATH:CRT2SRAM_DATAPATH|UART_Sys_dataout[11]" with stuck data_in port to stuck value GND
0 `! _0 e% ~0 ^Warning: Reduced register "CRT2SRAM_DATAPATH:CRT2SRAM_DATAPATH|UART_Sys_dataout[10]" with stuck data_in port to stuck value GND5 r) g- f; A$ ?) r) [) D6 r
Warning: Reduced register "CRT2SRAM_DATAPATH:CRT2SRAM_DATAPATH|UART_Sys_dataout[9]" with stuck data_in port to stuck value GND- v, j! h1 o3 u k) m
Warning: Reduced register "CRT2SRAM_DATAPATH:CRT2SRAM_DATAPATH|UART_Sys_dataout[8]" with stuck data_in port to stuck value GND
3 R( }, f7 p+ h$ AWarning: Reduced register "CRT2SRAM_DATAPATH:CRT2SRAM_DATAPATH|UART_Sys_dataout[7]" with stuck data_in port to stuck value GND: Y, h* {. u8 b& `# m# [5 P: U6 P0 l/ k
Warning: Reduced register "CRT2SRAM_DATAPATH:CRT2SRAM_DATAPATH|UART_Sys_dataout[6]" with stuck data_in port to stuck value GND4 e% ~/ J7 q. Y! t" {8 y
Warning: Reduced register "CRT2SRAM_DATAPATH:CRT2SRAM_DATAPATH|UART_Sys_dataout[5]" with stuck data_in port to stuck value GND* u( |* s7 I0 t$ z2 e7 P6 ~* L
Warning: Reduced register "CRT2SRAM_DATAPATH:CRT2SRAM_DATAPATH|UART_Sys_dataout[4]" with stuck data_in port to stuck value GND6 T4 \( D, _* c% |$ l' x
Warning: Reduced register "CRT2SRAM_DATAPATH:CRT2SRAM_DATAPATH|UART_Sys_dataout[3]" with stuck data_in port to stuck value GND! I( ?: q7 L( A
Warning: Reduced register "CRT2SRAM_DATAPATH:CRT2SRAM_DATAPATH|UART_Sys_dataout[2]" with stuck data_in port to stuck value GND
( E* |8 \+ s d5 Y+ _Warning: Reduced register "CRT2SRAM_DATAPATH:CRT2SRAM_DATAPATH|UART_Sys_dataout[1]" with stuck data_in port to stuck value GND. [) D& v5 Q0 ?
s8 V. A" s6 |! A, _+ A感觉是不是那个地方可能写的不对导致综合后给优化掉了还是怎的？
作者: inspiron1501 时间: 2009-3-1 10:54
这些寄存器都没有实际使用到，所以软件才会默认接地，应该是程序有问题
作者: flyingwxj 时间: 2009-3-4 14:00
你可以直接去看综合以后生成的 RTL 电路。看看出错的这部分对应的逻辑是否正确
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