标题: 分享:最新Hotfix_SPB17.20.022_wint_1of1补丁 [打印本页] 作者: auto1860 时间: 2017-6-29 13:23 标题: 分享:最新Hotfix_SPB17.20.022_wint_1of1补丁 本帖最后由 auto1860 于 2017-7-3 15:25 编辑 & U9 {; \9 `$ M3 G: v - T5 p. m& j2 }Fixed CCRs: SPB 17.2 HF022) y' a" z- V! l4 o
06-16-2017' n. k; Z4 @* N( I! o2 b' W
========================================================================================================================================================, Z$ |! i' \/ X+ p+ G) ?5 y8 T+ d
CCRID Product ProductLevel2 Title " v3 m/ ]! Q2 i3 X1 Y7 b======================================================================================================================================================== % l/ _1 B) Q' s1755789 ADW DBEDITOR Checking in HSS Block returns 'Failed to create archive' ( {' ` K' v2 _1 e# A/ }- E1731459 ADW FLOW_MGR Cannot open LRM from Flow Manager' s' U5 k6 Z2 {! Y, b- S3 w
1731460 ADW FLOW_MGR Cannot open LRM from Flow Manager 2 i0 R3 U% [! v1 ~: l1744081 ADW FLOW_MGR Error regarding configuration file when trying to open Workflow Manager1 |* d* v8 b: ]! Q, m# ^
1756727 ADW LIBIMPORT EDM Library Import fails with java exceptions when merging classifications3 p% _# S9 X$ M( j! o* _
1743763 ADW SRM Find filter is grayed out when Allegro PCB Editor is opened from EDM Flow Manager ; y1 l$ h5 P( N! L$ g) l7 ?1748399 ALLEGRO_EDITOR DATABASE In release 17.2-2016, end caps not visible for certain clines in PCB Editor# P5 X4 t9 k' f6 r4 \
1748522 ALLEGRO_EDITOR INTERACTIV A component mirrored using the 'funckey' command jumps to (0,0) position when the 'move' command is used on it " P) _, M# Q) P n/ X1734983 ALLEGRO_EDITOR INTERFACES Secondary step model does not stay mapped after drawing is reopened. M S {6 E- Y. u M/ _5 c
1753704 ALLEGRO_EDITOR REFRESH Refreshing symbols crashes PCB Editor/ }' \" a t% P3 P
1493721 ALLEGRO_EDITOR SHAPE Voids on negative planes are not adhering to constraints ( r' Q6 m) f! U- Q# W. f1711242 ALLEGRO_EDITOR SHAPE Route keep out leads to partly unfilled shapes with gaps k# F+ a; e9 A9 s, z1726865 ALLEGRO_EDITOR UI_GENERAL Pop-up Mirror command does not mirror at cursor position- s# D+ Z; b3 V) D) y1 a
1752987 ALLEGRO_EDITOR UI_GENERAL axlUIViewFileCreate zoom to xy location not working while in user created form. + ?* X+ T) c; v. t) J) A1755638 ALLEGRO_EDITOR UI_GENERAL In release 17.2-2016, zoom operations using mouse button not working when axlShellPost() is run5 |/ j" P+ N3 k; e! x& P
1719792 ALLEGRO_PROD_TOOLB CORE Productivity Toolbox Z-DRC hangs or crashes PCB Editor 5 k, g4 Y, v" F9 J1624869 ALTM_TRANSLATOR CAPTURE A structure file is required to translate a third-party schematic to OrCAD Capture$ Z( w) @' a0 K# \" s
1707416 ALTM_TRANSLATOR CAPTURE Missing components and pins in the OrCAD Capture schematic translated from a third-party tool $ I/ @( B( p! Q, n1708825 ALTM_TRANSLATOR CAPTURE The third-party translator fails to translate the schematic* @3 E) y0 r7 b! L
1719200 ALTM_TRANSLATOR CAPTURE The third-party translator fails to translate all the pages of a schematic M7 m' c) K0 Y2 p8 T, V
1546070 ALTM_TRANSLATOR CORE Third-party to DE-HDL schematic translation fails7 ? ?* P2 M2 @; i" z) D& h
1700508 ALTM_TRANSLATOR CORE Third-party PCB translator does not work in release 17.2-2016 # a% {% U3 G. S3 v& H3 G1699340 ALTM_TRANSLATOR DE_HDL Unable to import third-party schematic into DE-HDL using Import menu in PCB Editor : K; v1 n5 Z; k# O" y+ c2 |5 L1630379 ALTM_TRANSLATOR PCB_EDITOR Third-party translator is not importing clines and vias % |6 n- s& [% w! [" A! p1708615 ALTM_TRANSLATOR PCB_EDITOR All items of third-party PCB not imported in release 17.2-2016 ; A! G4 p2 l0 Q1758296 APD DXF_IF DXF OUT: Rounded rectangle pads mirrored incorrectly + p$ n u, Q& i7 Y6 S$ p4 e1756040 APD IMPORT_DATA The 'die text in' command ignores values after the decimal point, ]9 ]- S6 A' e
1727206 APD SHAPE Merging two shapes results in an incorrect shape6 G m/ G9 J$ s5 r7 i
1753682 CONCEPT_HDL CONSTRAINT_MG Constraint Manager stops responding while cross probing DE-HDL& {2 b& R. x2 F3 a
1721334 CONCEPT_HDL CORE dsreportgen not able to resolve gated part on schematic$ T; V7 o1 k; c" }/ |( I M
1747559 CONCEPT_HDL CORE Copying a logic symbol without a part table entry results in ERROR(SPCODD-53) 7 f; H( O3 m7 z/ T, W- m1749644 CONCEPT_HDL CORE In release 17.2-2016 Hotfix 019, 'align components' is not working on Windows 8 and DE-HDL crashes& d( J5 l$ f$ C/ U0 p; x! W
1746910 CONCEPT_HDL GLOBALCHANGE Global Component Change unable to identify part data when using schematic pick option 3 U. ]8 J# M% U/ m5 w/ `8 }7 O6 S' ?& p1743572 FLOWS PROJMGR Project Manager displays incorrect values in Project Setting6 r* N6 S, O% h7 m9 b4 s7 }
1724124 FSP DESIGN_EXPLOR Provide TCL command to filter design connectivity window 1 D" a3 e9 o. m) q, b( T J8 g1719105 FSP GUI Tabular sorting not working in FPGA System Planner + P1 R% w) }" G' ]: b! B" ]' N1755750 PCB_LIBRARIAN GRAPHICAL_EDI In release 17.2-2016, unable to delete _N pins in PDV Symbol Editor& {+ j- W+ {& p$ o
1722993 PCB_LIBRARIAN IMPORT_CSV Part Developer crashes while importing part information stored in a .csv file , m1 M, z K4 L1 ?1758856 SIP_LAYOUT 3D_VIEWER Correct the spelling error in the 3D Viewer Design Configuration window `2 Z5 e; O$ ]+ j. d$ C1755179 SIP_LAYOUT ARTWORK PCB Editor crashes when creating Gerber files; [* f7 X& `2 [* ]
1743511 SIP_LAYOUT MANUFACTURING Package Design Integrity shows non-redundant padstacks in the Redundant Padstacks check+ ~4 h0 E5 r' _5 N8 u
下载链接$ G, d3 ^- p' i