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标题:
SystemSI仿真时VTT报错
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作者:
ares0260
时间:
2016-6-18 17:24
标题:
SystemSI仿真时VTT报错
请教各位，在仿真ddr时有如图报错
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有劳各位指点一下！！！
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*** Messages reported by SPDSIM (build14.0.2.09101) ***
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Warning 5160: ".ends rpacks " is not supported in include file, ignored.
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Location: statement at line 4
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Context: .inc 'D:\Cadence-SI\CHP4\T20160612\L1\TEST\DEMO\rpacks.sp'
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Error 2178: In the value expression:
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Undefined parameter name "vtt".
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Location: statement at line 197
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Context: .end
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作者:
Dandy_15
时间:
2016-10-11 09:00
VTT 没有定义，定义一下就可以了，
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