标题: 错误之Page 2 cannot be saved as logical page 1 has different page mapping... [打印本页] 作者: iseariver 时间: 2015-10-13 16:33 标题: 错误之Page 2 cannot be saved as logical page 1 has different page mapping...
- z3 f) z) W( g) @2 f# E+ K3 Y) i采用Allegro 16.6， 1 T1 U& v' @9 ?5 u5 |1 n+ E保存有个错误，如下：; r9 F, l0 j) k1 K; D! Y
Page 3 cannot be saved as logical page 2 has different page mapping in connectivity data 8 R* f- _6 c- L m; q, k: u! k8 ]: C4 o3 ~$ f# r5 x
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同时，网表输出不了PCB文件。谢谢，在线等。。。 ! ]" ~# l8 ?) ~$ M8 n9 `, K作者: kinglangji 时间: 2015-10-13 16:53
真心没看懂...HDL原理图?作者: Emerson 时间: 2015-10-13 17:16
同不懂 坐等见过的~作者: Larry_11844 时间: 2015-10-14 10:26
坐等大神回答