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标题: SPB17.0BUG讨论贴 [打印本页]

作者: steven.ning    时间: 2015-6-22 08:26
标题: SPB17.0BUG讨论贴
发现一BUG:用ALLEGRO17.0 PSPICE仿真时会无故退出。不知破解的原因?还是什么?
作者: pzt648485640    时间: 2015-6-22 11:29
补丁打到多少了呀
作者: steven.ning    时间: 2015-6-22 11:36
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作者: steven.ning    时间: 2015-6-22 11:39
BUG二:PSPICE仿真后,波形都出来了,用SU标点一下波形,软件自动退出,重新打开不能再仿真,只能重建仿真项目。
作者: pzt648485640    时间: 2015-6-22 11:42
steven.ning 发表于 2015-6-22 11:36; B* h$ p( H5 b( H  _
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打下最新补丁试试;有些问题主要来源是破解问题造成的;Cadence软件来回效验好几次5 T  w* b* k% [$ N/ A/ Z) A
DATE: 06-5-2015    HOTFIX VERSION: 003
5 C: @2 n+ W$ L===================================================================================================================================
, f, {- @5 f/ FCCRID   PRODUCT        PRODUCTLEVEL2   TITLE5 K2 H3 ]  e4 }  f2 r
===================================================================================================================================
. d' @. |: A1 P5 R  B295747  ALLEGRO_EDITOR PLACEMENT        Place manual form takes a long time to open
; @( q% ]& A4 u5 u, M/ l832170  SIG_INTEGRITY  SIMULATION       IBIS buffer results with two TV curves do not correlate with HyperLnx or MATLAB results
. |1 {. Q  i/ e926138  SIG_INTEGRITY  SIMULATION       IBIS buffer results with two TV curves do not correlate with HyperLnx or MATLAB results
. t8 m) N& E2 D( G5 Z0 l+ P: j9 C1306988 SIG_INTEGRITY  SIMULATION       Support needed for the multiple VI and VT waveforms for the buffer with TLSIM
' q0 m  h+ b6 |; \& v1376591 ALLEGRO_EDITOR COLOR            Dehighlight command with "Dehighlight All" option does not remove the color marker swatches from Constraint Manager! M# D% |: W/ _0 F! }: U
1379188 CONSTRAINT_MGR INTERACTIV       PCB Editor crashes when opening the min/max delay worksheets in Constraint Manager( ?" I3 B" {% v, }
1397823 ALLEGRO_EDITOR MANUFACT         Pass property for shapes defined as Fillets in IPC 2581 output
5 ]: D) ]& x  h1 m1 R+ n& J1404858 CONSTRAINT_MGR OTHER            ERROR: Can't import electrical constraint data (pstcmdb.dat)- x/ {! \  `  A3 o2 a3 S  {4 V
1405333 CONCEPT_HDL    CORE             The Edit - Search - Option command  (Find) does not work in LINUX( @6 |% b3 ~5 b  [, @3 I0 I
1406666 CONSTRAINT_MGR SCHEM_FTB        Add blacklist and whitelist support to diff3 reports
9 f! W% A* x' l4 D- ^- T1406780 CONSTRAINT_MGR OTHER            Deleting cline segments when Constraint Manager is open on net properties bundle crashes PCB Editor
9 b: k" u% W* X+ k8 Q5 W1411637 SCM            SCHGEN           Incorrect Ref Des in the flattened schematic generated by exporting from System Connectivity Manager5 O% G; y; K1 I
1415205 CONSTRAINT_MGR OTHER            Constraint Manager only stores the last resolved analysis when formulas are entered
" F0 J0 E9 @  h1416059 ALLEGRO_EDITOR PLOTTING         Some of the pins are not visible in the  PDF generated by Allegro PDF Publisher9 q0 n( O3 e, F8 V
1418484 SIG_INTEGRITY  SIMULATION       Estimated Xtalk and Simulated Xtalk results do not match in 16.6 ISR044
1 |6 o: n! d) g+ M- S/ k1419041 ALLEGRO_EDITOR DATABASE         DBDoctor removes tapers and displays ERROR(SPMHUT-17) and WARNING(SPMHDB-391) messages
0 h. ~( Z- h5 L4 B$ J5 `. d5 z1419995 SIG_INTEGRITY  OTHER            Model assignment auto setup does not use refdes when determining what type of model to create7 q" D+ ^; ~3 x3 l
1420551 CONCEPT_HDL    CHECKPLUS        Rules Checker (Checkplus) crashes when a part is missing from the library
/ w7 k& j- L, x' w& s0 C. k5 B! I. ?7 f1420580 CONSTRAINT_MGR INTERACTIV       Constraint Manager crashes when displaying the Relative Propagation Delay worksheet: v9 i8 L9 v& i9 B) b0 M
1420623 CONCEPT_HDL    CREFER           creferhdl fails with message std::bad_alloc on Windows and Linux& n8 d( p2 |2 d! x
1421769 ALLEGRO_EDITOR MANUFACT         NC Drill legend behavior changed from S040 to S048
/ X- p2 e. O0 ?8 S: T. n3 B# U1422153 CONSTRAINT_MGR OTHER            The display in cmDiffUtility is corrupted after a Match Group is removed
" k+ T% h* B$ h" w- d1422993 SIP_LAYOUT     DIE_STACK_EDITOR Diestack Editor graphics depicts die stack incorrectly. The complete stack isn't shown
' }  ~) d* U* e  l, M1423988 ASI_SI         GUI              DesignLink system configuration file is not set automatically on SI-Base
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作者: steven.ning    时间: 2015-6-22 11:47
已经用回16.6了,过段时间再折腾17.0.
作者: blueguyhk    时间: 2015-7-7 15:38
本帖最后由 blueguyhk 于 2015-7-7 15:40 编辑
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這兩天在試畫,確是常常無故退出(pcb editor, spb17.03, win8.1)
作者: blueguyhk    时间: 2015-8-18 17:11
本帖最后由 blueguyhk 于 2015-8-18 17:45 编辑
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spb17.0真的很小人安装.....
5 }1 O. T, n& t- X请教capture 与 allegro交互在"新进行" "create netlist"后就可"交互", 但关闭重开程序后就无法"交互",这也是17的"bug"?......win8.1/64, 已装hotfix05   >.<




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