6 r, L+ M9 B3 b" \2 ?. y h DATE: 05-01-2015 HOTFIX VERSION: 002, P) Z/ ^ ~) [5 ~3 t$ L
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=================================================================================================================================== 8 d+ W, C* z) y } 1315048 ALLEGRO_EDITOR INTERFACES IPC2581 translation inconsistency on negative layer* b' r- o6 l/ A/ ~
1362745 CONSTRAINT_MGR OTHER Allegro PCB Editor crashes on opening Constraint Manager with any design1 o; ~: J. b e. X, m4 y
1373412 ALLEGRO_EDITOR GRAPHICS SigXP Print Canvas : Via model seems to be filled by black Via box. $ E9 z3 G3 d" a 1376765 CONSTRAINT_MGR ANALYSIS SETUP/Hold spreadsheet lists only one pin pair8 U6 l; R. x( b; ?- G0 N9 N! d
1399646 ASI_SI OTHER Should be able to run mbs2brd with SI/PI base licenses) |4 I' R; l) B; S
1400215 SIG_INTEGRITY REPORTS cross talk failure on certain nets in PCB SI 16.6! |; m! h, y9 R5 s
1400302 ALLEGRO_EDITOR MANUFACT Copper Thieving is working differently in SPB16.6 as compared to SPB16.5* j, {6 y2 i" k5 M' _
1400755 ALLEGRO_EDITOR SHAPE Updating the shapes on the ATTACHED deisgn causes a short to a pad. 8 A; U! p0 p6 g" R 1400813 ALLEGRO_EDITOR SHAPE PCB Editor crashes when you delete islands from all the layers and save the board( w& k( x/ U$ [7 l5 _4 i
1404174 SIP_LAYOUT OTHER Creating bounding shapes generates INCORRECT shapes and DRCs- u. D, A7 X" d0 X2 `
1404184 ALLEGRO_EDITOR INTERFACES Step package mapping - Save is disabled for certain symbol / ?4 x) E& h" s$ E% P 1406457 ALLEGRO_EDITOR SCRIPTS Unable to launch allegro.exe -orcad after update hotfix 046 { t: Q. u3 K J% x- b 1407123 ALLEGRO_EDITOR OTHER Lines with zero line width are not being printed in PDF format. {, F' ^' {& x6 g- B5 Q
1407483 ALLEGRO_EDITOR REFRESH The 'refresh symbol' command creates an unrouted connection in a fully routed design/ r' l8 h: A9 W
1408072 SIP_LAYOUT OTHER Net assignment for a BGA component fails on running the File - Import - Netlist-in wizard command.& v0 {: f( V! b, Q
1410857 ALLEGRO_EDITOR DRC_CONSTR Diff Pair Uncoupled length DRC gives different results in SPB16.3, SPB16.5, and SPB16.6.& m" l( f8 ]7 Y* I4 A4 I
1413235 ALLEGRO_EDITOR INTERACTIV Find by Query with Via Structures: GUI freeze 6 U# @" k. v/ u1 q. V8 Z7 k. f9 H
DATE: 04-03-2015 HOTFIX VERSION: 001 7 R* ?" e' X. K2 J/ U2 i0 q# i8 ? ===================================================================================================================================! N" w2 u5 t8 ] U1 k
CCRID PRODUCT PRODUCTLEVEL2 TITLE9 d* d: p, ~2 [8 c& M) ~. m
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491042 CONCEPT_HDL SECTION Prevent PackagerXL from changing visibility on SEC attribute 7 G1 R& f8 a- V0 H 1205900 ALLEGRO_EDITOR INTERACTIV additional object polygon-rectangle for "snap to pick"; u' X* j) A2 e, S. X- J0 r# G
1327533 SIP_LAYOUT REPORTS Metal Usage Report fails2 r0 b) N! f4 V/ m
1341177 ALLEGRO_EDITOR PLACEMENT "Place Replicate Unmatched Component Interface" window size should be increased to show "Matched Component"! I' r/ [: o: q: ?* k
1360269 SIP_LAYOUT REPORTS Getting incorrect results in the Metal Usage report of SiP Layout when the variable METAL_USAGE_REPORT_NOARCS is set( a1 ^6 F$ n5 O- V) c: C$ \
1361281 ALLEGRO_EDITOR INTERACTIV Moving stacked vs non-stacked via's should be the same. / V4 R- t) \' _ v1 Z 1366525 ALLEGRO_EDITOR INTERACTIV Add replace via with via structure command to Allegro PCB % D' O5 f4 c1 E/ v' N, t4 N% e 1368091 ALLEGRO_EDITOR INTERACTIV Snap pick to fuction should see fiiled rectangle as a shape5 m& A4 C7 h3 F3 ? R, U* v
1371510 APD DATABASE How to show DRC when tack point of wirebond out of finger boundary6 b7 t7 L$ @8 m) O
1373564 ASI_PI GUI Impedance results are incorrect in PFE ) d$ A3 [5 G/ o' n% p 1374703 ALLEGRO_EDITOR SHAPE Inconsistent behavior on shape voiding2 ]( P: J7 }! D% Z+ u& |7 v3 `9 {9 w5 J
1376851 CONSTRAINT_MGR UI_FORMS CM workbooks change after simulating $ x# R3 j( p; q. Z% O 1377555 ALLEGRO_EDITOR DRC_CONSTR The "Line to SMD Pin Same Net Spacing" DRC toggles everytime we run "Force Update" of Dynamic Shapes. $ v# I9 z7 _1 i1 l: [; g 1378032 ALLEGRO_EDITOR REPORTS Report command and batch mode give different Waived DRC Report results in PCB Editor 9 S a. v, I5 R! w8 j8 O5 _* {5 G7 g 1378611 ALLEGRO_EDITOR INTERFACES Enable STEP export to convert the mixed unit into one single unit 7 z/ n! @5 ?! n4 o5 n0 O* R( z 1379240 APD PLACEMENT Placement gives error regarding the difference in units between the database and symbol, which is not the case ' T8 C* ]2 b5 ` 1394908 ALLEGRO_EDITOR DATABASE Database crashes on doing "Show Element" on selected net: _5 |' b" n" L
1395541 ALLEGRO_EDITOR PLOTTING Export PDF not correct for Phantom lines / L1 G$ V4 p4 g+ j3 ^ 1395747 CONSTRAINT_MGR INTERACTIV Rename refdes causes Allegro to crash. Possibly due to CM being open., b5 X S) Y2 o
1396915 APD STREAM_IF The question about MIRROR geometry function from stream out2 e* T/ e% A, C- @/ f2 Q. J6 T
1398184 ALLEGRO_EDITOR MANUFACT Mismatch in backdrill data with IPC-2581 export作者: allanwang 时间: 2015-5-7 09:08
谢谢楼主分享！作者: qiuzhang 时间: 2015-5-7 10:18
现在补丁小了好多了，试试作者: zxpchx 时间: 2015-5-7 13:20
是不是和原来16.6的升级方式一样？作者: qiuzhang 时间: 2015-5-7 13:59
打上补丁，在运行下破解就行了作者: zgyzgy 时间: 2015-5-7 14:41
可以转低版本了吗？作者: pzt648485640 时间: 2015-5-8 03:38
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