2 k9 Q* g8 j- n& k1 @ . m/ V' N- f- F1 w/ f7 d+ A $ Z* D# g+ p" S 9 E' R" B7 ~3 ^% U" n不好意思昨天去医院。分享链接：http://pan.baidu.com/s/1jGqqNpc , h$ m, u: G: a作者: zgyzgy 时间: 2014-11-16 10:34
& |! Y& w8 v; ]+ [+ B8 [6 _
DATE: 11-14-2014 HOTFIX VERSION: 039+ U( b8 C `4 _ Y3 k1 f1 x
=================================================================================================================================== S/ t3 s5 K/ }: NCCRID PRODUCT PRODUCTLEVEL2 TITLE # ~; L: w3 c8 t) L=================================================================================================================================== 3 f* @( h4 L" w1213239 FLOWS PROJMGR SPI_ERROR: Missing closing quote at line 41 in"" 9 h/ j, e' ]8 D8 W2 ^- A1301262 SPIF OTHER When creating .dsn file for designs containing netclasses with net groups, PCB Editor stops responding. 1 \& B0 D% w$ T- \1301469 CONCEPT_HDL CORE DE-HDL Import Design - Need a directive to enable the "Retain Hard Packaging Information" option by default) i8 W. `3 _* C a6 f7 T
1309535 SYSTEMSI ENG_PBA PA5700: Cannot print, save, or post process SI analysis reports1 w( Q% r- r' t7 X9 U: e6 E
1317019 SIG_INTEGRITY LIBRARY Buffer model for pins not changing correctly when multiple DML files are present in working directory. 3 _8 S) h. b: D& v' `- B1318452 ALLEGRO_EDITOR DATABASE Derive Connectivity does not update connections; DRC errors thrown 1 w6 V2 I5 |/ x* z f/ P1318610 CONCEPT_HDL CORE DE-HDL does not re-validate/re-read DML files on disk upon launching Constraint Manager 2 y, ^$ R4 p [- q6 U1320997 CAPTURE SCHEMATIC_EDITOR Copy paste of multiple images are stacked in same place. ! X$ }) q2 d, R( Z0 Z5 N9 v1321377 FSP GUI FSP crashes while performing copy-paste operations between different arrays in the Rule text editor ! Z2 d6 `2 p0 d* e8 {1321513 ALLEGRO_EDITOR SYMBOL Preview not available for DRA7 @2 B2 y# {$ S
1324479 ALLEGRO_EDITOR OTHER Option specified in license_packages_allegro.txt file but missing in license server causes Segmentation fault on LINUX ! _+ _! y, i4 C: m$ _2 W& d* P1327962 FSP MODEL_EDITOR Need ability to select multiple pins in the Preview area of Rule Editor , X4 y! [- T& v1328633 CONCEPT_HDL CORE On running Save All, changes were partially saved before DE-HDL crashed." a: u4 A( d, d2 ^$ S
1328921 ALLEGRO_EDITOR DATABASE Running Derive Connectivity followed by Database Check throws SPMHUT-17 error) J. y1 I5 b2 ^& _. O: x
1330029 CONCEPT_HDL CORE PIN_TYPE and PINUSE attributes not updated consistently in DE-HDL design - k O% V# a9 H3 U3 e% I, z% l4 }1330580 SIP_LAYOUT SYMB_EDIT_APPMOD When adding a pin using the Symbol Editor the Pin Name is being changed if duplicated7 Z: c/ [5 {4 f& Q' F! t5 U4 c
1331028 CONCEPT_HDL CHECKPLUS Rules Checker fails on DE-HDL component.* _( u/ |) ?7 g; L2 w& ]) G
1331051 ALLEGRO_EDITOR INTERFACES Soldermask layer is mapped to both Soldermask solderPaste and Miscellaneous Image Layers columns using IPC-2581B5 X/ E# @+ l5 S# F& n
1333127 CONCEPT_HDL CORE Sheet number in the new window is only the block-level number and not the design-level number3 B7 X' e0 Y' |) I' d" U9 }
1333591 SIP_LAYOUT SKILL Difference in behavior for padstack replace using axlPadstackReplace and command Replace Padstack! n6 Q7 w/ t3 ?3 B7 b* F, m- m
1333896 ASI_SI OTHER signoise -f and -k options don't work for net names with consecutive underscores.3 j' U. A+ F8 M/ Z: q
1333982 ALLEGRO_EDITOR ARTWORK ARTWORK: Coordinates of the hole get shifted by the "Draw holes only" option.2 y) [6 j6 G" e; M+ p
1334302 CONSTRAINT_MGR SCHEM_FTB Import Logic - Import changes only or Overwrite current constraints fails to update signal models. 1 A) z; J! q- c9 S6 @7 C+ c1335276 CONCEPT_HDL OTHER On selecting objects near the schematic page border, the border is also selected3 \2 C L9 S: U2 D
1336322 CONCEPT_HDL CORE DE-HDL does not open with maximized window.0 W( @# S9 P- W8 C4 ~: L
1336783 PCB_LIBRARIAN IMPORT_EXPORT con2cap fails to export the part to OrCAD Capture format作者: cxyjoe 时间: 2014-11-16 11:39
非常感谢！作者: mengshang 时间: 2014-11-16 13:07
谢谢分享啊作者: Light.hua 时间: 2014-11-16 20:55
谢谢楼主分享！！！！作者: Shyoung 时间: 2014-11-16 22:00
更新也太快了吧！作者: nbxiong 时间: 2014-11-16 23:47
O YEAH ~ 我就知道晚上来逛一下肯定有收获作者: wsn2010 时间: 2014-11-16 23:52
多谢作者: waiwai788 时间: 2014-11-17 00:04
太快了作者: crskynet008 时间: 2014-11-17 08:22
强烈支持上传！作者: wangye_123 时间: 2014-11-17 08:47
期待着。。。感谢楼主作者: amaryllis 时间: 2014-11-17 08:53
真的是太快了，刚下了38还没装呢。2 H/ X w5 b$ R9 N
楼主好生牛，顶起作者: zgyzgy 时间: 2014-11-17 13:37
终于下载完了，正在上传哈。下载及不稳定，多次99.9%了又重新下载！作者: i_333333 时间: 2014-11-17 14:38
非常非常感谢楼主作者: Maxim 时间: 2014-11-17 17:09
我很想知道，NC drill的问题到底解决没有作者: yusongking 时间: 2014-11-17 17:10
哪里有下载作者: nbxiong 时间: 2014-11-17 17:12
估计还没上传完作者: nbxiong 时间: 2014-11-17 17:12
论坛应该加多开通一个微信公众号作者: leesan001 时间: 2014-11-17 23:42
kankan作者: Maxim 时间: 2014-11-17 23:57
直接等40号补丁得了！作者: adolfchen 时间: 2014-11-18 08:58
谢谢分享啊作者: wxmcumtb 时间: 2014-11-18 10:27
谢谢分享。。。作者: wolfshiao 时间: 2014-11-18 11:03
下來放著,等有空再來更新..8 E! w( g9 r( q& Z% ]- s! U
謝謝大大分享囉!!作者: hzqydq69 时间: 2014-11-18 13:10
感谢楼主的资料分享1 f M( u# M4 u( A 作者: tzljbj 时间: 2014-11-18 14:02
谢谢分享！作者: sunyooh 时间: 2014-11-18 17:22
有没有17.0 的版本？作者: wangerfeng 时间: 2014-11-18 20:01
17.0还没发布呢作者: bingshuihuo 时间: 2014-11-27 11:27
终于下载完了，作者: linsky2000 时间: 2014-12-4 17:20
更新了，谢谢楼主的分享！作者: shirdon 时间: 2014-12-12 10:36
要重新破解码，是否需要另外破解作者: nat 时间: 2014-12-12 15:15
使用中，发现了BUG，1.设置规则默认线宽每层不一样，再来设置差分线宽的时候，软件报错，强制退出。2.焊盘编辑器，编辑了焊盘更新回allegro中有时会报错，强制退出。作者: zgyzgy 时间: 2014-12-15 10:40
