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本帖最后由 stupid 于 2011-3-8 14:47 编辑 . J: ?# u- J% o
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回复 1988_dwu 的帖子' x8 [! x' d8 t3 n3 r$ N9 j
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恩，国内的一个实验室往往不如国外工程师的一个工作台，情况就是这样，但我们还要前行。在高速的SerDes，Retimer，Equalizer等半导体方面我们比硅谷落后2代，但至少我们可以争取应用层面只比那边落后一代，除开禁运的原因，我们要在技术研究层面力争跟硅谷保持同步。
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对于我们来说，可行之处是争取无源链路的设计，仿真，验证，测试在同一水平。
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* K- A+ X$ |' j回过头来再看这次展会，截止目前为止，Anritsu是唯一可以提供28Gbps 4tap 预加重的厂商。! `* s$ C: y8 y$ Z% f+ x: o2 D. [
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Anritsu introduces jitter tolerance, 4Tap pre-emphasis systemFebruary 2, 2011. Y* r2 ?/ S% u- P0 ]- h2 v
3 j* A5 w: n9 Z' S, f6 @FEBRUARY 2, 2011 -- Anritsu Company introduces a jitter tolerance and 4Tap pre-emphasis solution designed to test interconnectsup to 28 Gbps (Gbit/s) during DesignCon 2011. The new offering is designed to meet the signal-integrity requirementsassociated with designing backplanes for high-speed interconnects, such as Infiniband 26G-IB-EDR, CEI-25G, CEI-28G-VSR, PCI Express, SAS, SATA, FB-DIMM, USB 3.0, and Display Port, enabling engineers to ensure their products meet designated specifications. At the center of the system is the MP1800A Signal Quality Analyzer (SQA), which is integrated with the MU181500B Jitter ModulationSource and MP1825B 4Tap Emphasis instrument. The solution generates pre-emphasis signals to conduct accurate testsand evaluations on high-speed devices, as well as more precise and complete signal integrity analyses up to 28 Gbit/s. Jitter tolerance testing is supported by transparent output of input data and clock jitter components without attenuation or amplification to ensure accurate, repeatable measurements. The MP1800A is a modular BERT with a built-in Pulse Pattern Generator (PPG) that supports output of low intrinsic jitter signals; a built-in Error Detector (ED) with high-input sensitivity of 10 mV; and support for signal analyses, including bathtub and Q measurements. The MU181500B module adds precision SJ, RJ, BUJ, and SSC up to 28 Gbit/s to the MP1800A. Adding precision jitter components to the low-jitter, high-quality PPG waveforms supports jitter tolerance testing with high reproducibility and reliability, for easy configuration of tolerance test systems for next-generation CEI-28G-VSR interfaces. The MP1825B, operating at up to 28 Gb/s, adds four taps for various pre/post-cursors to PPG signals, offering the perfect solution for evaluating the characteristics of printed circuit boards (PCBs), such as backplanes. The four taps can be set as pre- or post-cursors with 20 dB of setting range. The MP1825B allows users to compensate for losses in high-speed data communications channels or to simulate the effects of frequency-dependent loss in those channels.
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2011年2月2日- 在2011 DesignCon活動中，安立知推出的抖動容限(jitter tolerance)和4階預加重(4 Tap pre-emphasis)系統解決方案，測試速度可達28 Gbps。新產品可滿足高速連線背板設計時， 信號完整性(signal-integrity)的驗證測試需求，如Infiniband 26G-IB-EDR, CEI-25G, CEI-28G-VSR, PCI Express, SAS, SATA, FB-DIMM, USB 3.0, and Display Port，使工程師能夠確保其產品符合指定的規格。
' Q R3 T. g( B8 y$ _, I# T7 n其系統中心為MP1800A信號質量分析儀(SQA)，同時整合了MU181500B抖動調變(Jitter Modulation)控制模組，與MP1825B 的4Tap Emphasis模組。該解決方案產生預加重(pre-emphasis)信號，針對高速元件進行 精確的測試與評估，其提供高達 28 Gbps精確和完整的信號完整性分析。 抖動容限測試是藉由儀器精準控制測試訊號和時脈訊號內的抖動成分，不透過任何衰減器或放大器，以確保精準及可重複性的測量。
! E4 @! U+ @" C6 @& lMP1800A是一個模組化BERT，包含脈衝碼型產生器(PPG)，輸出高品質測試訊號，其帶有的抖動值(Jitter)非常小；以及誤碼偵測儀（ED）靈敏度高達10 mV，來支援信號分析，同時可提供澡盆圖(bathtub)和Q值分析軟體。
9 x+ N4 ?* J6 P/ I H9 O9 u7 y該MU181500B模組為MP1800A提供了高達28Gbps精確的SJ, RJ, BUJ, 及 SSC jitter功能，搭配高品質的脈衝碼型產生器(PPG)輸出訊號，可支援新一代CEI-28G-VSR介面的抖動容限測試。 : e. G t4 ?9 q2 a
MP1825B操作速率高達28 Gbps，搭配PPG 輸出訊號可提供高達4 Tap的emphasis 訊號合成，為PCB背板的評測提供了完美解決方案。其4階(4 Tap) emphasis可以設定為前置或後置游標，設定範圍高達20dB。MP1825B讓使用者在高速數據通訊下調整，以彌補頻道中的訊號損失，或模擬測試傳輸時頻率相關損失的效應。 - x8 q$ w: y( T) j1 s4 ^% ?+ i
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