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Hotfix中只需要安装最新的版本即可。
7 r) x* }6 |2 g7 z0 P: {, j, ]" N: KHotfix024对以下项目做了修正：. i* X) Q- [+ Q2 M( a5 D
DATE: 06-20-2012 HOTFIX VERSION: 0243 x/ j5 i. Q+ O) n' a* L# E1 X
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CCRID PRODUCT PRODUCTLEVEL2 TITLE4 N J/ a( T- p$ _6 |
===================================================================================================================================; j/ N* c7 D; L% u. c
982824 ALLEGRO_EDITOR OTHER Import placement fails with a zero length log file.
. t2 t$ z( A! `4 ]) h/ D1006437 SIP_LAYOUT BGA_EDITOR SCM not loading the die if dies refdes and LFnames are changed* w: X3 n5 U/ ?3 V( D3 k
1011040 FSP PROCESS Feature to avoid connectivity between fixed voltage Output and variable voltage Input$ | P& R3 J o8 F5 K. C4 O
1012985 ALLEGRO_EDITOR DATABASE Allegro crashes multiple times a day5 I, i% \- i2 `5 B4 O# h
1013644 ALLEGRO_EDITOR SHAPE Sliding trace with oops creates a duplicate shape islands/ C) }. _4 Y, m: ]- s
1014351 ALLEGRO_EDITOR OTHER Whenever we open a file (brd, dra) in PCB Editor with an OrCAD PCB Designer license,we get a warning SPMH0D-34; c6 {" n0 K7 R* G
1014893 CONSTRAINT_MGR OTHER With CM open layout is extremely slow and Allegro crashes very frequently# M7 }7 S& p m! ^# R6 r; u
1015210 ALLEGRO_EDITOR DRC_CONSTR Deleting Via from an array casues DRC errors
; x& e _1 X4 I* y; I! d% J* g1016546 CONCEPT_HDL CONSTRAINT_MGR Wrong value of NET_PYSICAL _SPACING_TYPE in Attribute form# ~! m- `4 ^ X% [
1016932 RF_PCB DISCRETE_LIBX_2A Incorrect Symbol Pin Numbers after import into ADS
! q6 L* n4 f2 t1017332 APD VIA_STRUCTURE Refreshing Via Structures results in shorting to power plane.
V2 b4 N. D* ?# b8 u1017931 ALLEGRO_EDITOR OTHER IPF import fails with error-IPF error : Illegal pen number' }% h$ Z5 ?9 O5 C# X$ n
1018413 F2B PACKAGERXL Export Physical producing different results depending on how it is launched) \3 \4 p& P3 U6 f5 ~5 R$ W7 F0 [
1018435 APD OTHER Oblong pads in Sip are not displayed correctly in the Stream_out .sf file.
) h& S: I' D- r8 q1018936 ALLEGRO_EDITOR OTHER unexpexted DRC eror9 \. h7 h" i1 b0 b3 {" `
1018978 ALLEGRO_EDITOR DRC_CONSTR Update DRC changes DRC without any change in design
( }# [ b' |9 v$ E% P1019303 CONCEPT_HDL INFRA DEHDL custom outport displays error8 K3 G% }8 m5 u: F- _. S
1019913 ALLEGRO_EDITOR DATABASE BUG:Bottom pins are also shown in DXF export9 R$ @! I7 L# s6 Z
1019955 ALLEGRO_EDITOR SKILL axlRegionCreate and axlRegionAdd do not work in a symbol file." ~( s$ b$ _5 T1 y1 _9 P6 V) r
1020749 ALLEGRO_EDITOR DATABASE 16.2 Parts not updating when opened in a 16.5 database
* q$ c) g4 Y# J& W$ ` V1020780 APD COLOR APD crash on assigning color to net using Color192/ P7 n& @5 V' P ~7 P
1021033 CONCEPT_HDL CONSTRAINT_MGR Cleared ecsets in 16.3 reappears as mapping errors without ecset names after uprev to 16.5 |
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发表于 2012-6-23 10:23
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