Orcad Capture CIS 导网表问题，求助！

whb3103536

0 i% z) d3 k! x4 C$ B各位我在用Orcad Capture CIS 16.2 导网表时遇到一些难题！如下：

********************************************************************************
5 ]7 B1 \; X: t( f$ Q% v! K*
  E3 K9 j- @: [/ l* Netlisting the design
*
) H* Y2 _3 n) p) W7 K8 J: D5 [! d1 G********************************************************************************
1 D9 S3 i, S8 V: K- qDesign Name:
8 H' x" E+ |4 W  a: Q$ @8 w$ h: bf:\work\g-plus\g120\sch\g120_allegro.dsn
Netlist Directory:
% W, \7 P7 E$ i$ u; E1 G! ^9 C& O  HF:\PROJECTS\CADENCE\G120\NETLIST
Configuration File:
C:\Cadence\SPB_16.2\tools\capture\allegro.cfg
Spawning... "C:\Cadence\SPB_16.2\tools\capture\pstswp.exe" -pst -d "f:\work\g-plus\g120\sch\g120_allegro.dsn" -n "F:\PROJECTS\CADENCE\G120\NETLIST" -c "C:\Cadence\SPB_16.2\tools\capture\allegro.cfg" -v 3 -j "PCB Footprint"
#1 Warning [ALG0016] Part Name "BATTERY-CONNECTOR_3_KBC23S3M_R_BATTERY_CONNECTOR" is renamed to "BATTERY-CONNECTOR_3_KBC23S3M_R_".
4 d+ `) A3 {$ b  D#2 Warning [ALG0016] Part Name "SCHA1A0101_1_T-CARD-PUSH-PUSH_AC0200-030" is renamed to "SCHA1A0101_1_T-CARD-PUSH-PUSH_A".
#3 Warning [ALG0016] Part Name "CONN FLEX 5_FPCKEY_5PIN_FPC_KEY_CON" is renamed to "CONN FLEX 5_FPCKEY_5PIN_FPC_KEY".
#4 Warning [ALG0016] Part Name "SIM_CONNECTOR_3_AC0100-063_AC0100-063" is renamed to "SIM_CONNECTOR_3_AC0100-063_AC01".
#5 Warning [ALG0016] Part Name "CSTN_0.4'_C15DDS29_CMC1P4236-E_CMC1P4236-E" is renamed to "CSTN_0.4__C15DDS29_CMC1P4236-E_".
#6 Warning [ALG0016] Part Name "GL826 LQFP46_3_QFN46_GL896-LQFN46_4.5X6.5X0.66MM" is renamed to "GL826 LQFP46_3_QFN46_GL896-LQFN".
#7 Warning [ALG0016] Part Name "TOSHIBA_TV00578002_0_FLASH_256_128_S71PL_N" is renamed to "TOSHIBA_TV00578002_0_FLASH_256_".
3 S5 z7 R0 j& s#8 Warning [ALG0016] Part Name "FAR_F5KA_897M50_D4DC_0_SAW_5P_FAR_F5KA_897M50_D4DC" is renamed to "FAR_F5KA_897M50_D4DC_0_SAW_5P_F".
* Q2 Z9 D9 }' {- |* q#9 Warning
! E6 B& [9 s) H1 p3 _" c[ALG0016] Part Name "TCVCXO_1_CRYSTAL_3225_SQ3D02600B2JBA" is renamed to "TCVCXO_1_CRYSTAL_3225_SQ3D02600".
#10 Warning [ALG0016] Part Name "BT_SAW_0_LFB182G455G9A293_LFB182G45SG9A293" is renamed to "BT_SAW_0_LFB182G455G9A293_LFB18".
8 ^0 D. ]! G$ b: P" k6 W/ `#11 Warning [ALG0016] Part Name "SGM2022-EYN6/TR_SOT23-6_SGM2022-EYN6/TR" is renamed to "SGM2022-EYN6/TR_SOT23-6_SGM2022".
#12 Warning [ALG0016] Part Name "SDFMM1N12CA2T_4_MT6188_MT6188(MTK)" is renamed to "SDFMM1N12CA2T_4_MT6188_MT6188(M".
# N; Y5 z) ]/ e4 E1 Y# O; [#13 Warning [ALG0016] Part Name "CONN RCPT 14/SM_3_USB_12PIN_MUB01-AK22110" is renamed to "CONN RCPT 14/SM_3_USB_12PIN_MUB".
/ M# U+ Z9 c+ T% }" I5 _#14 Warning [ALG0016] Part Name "XTAL_3PIN_CARYSTAL_32K_32.768KHZ" is renamed to "XTAL_3PIN_CARYSTAL_32K_32.768KH".
; F! {. n  }( I2 y#15 Warning [ALG0016] Part Name "4PIN_XTAL_CRYSTAL_3225_27MHZ/10PPM/7M32000035" is renamed to "4PIN_XTAL_CRYSTAL_3225_27MHZ/10".
# E+ H0 R: T0 f" C1 X#16 Warning [ALG0016] Part Name "BZX84C15/SOT_0_SOD2512_NC/CZRF52C6V2" is renamed to "BZX84C15/SOT_0_SOD2512_NC/CZRF5".
( X" y1 f& S; R. X8 j  ?3 w" k1 BScanning netlist files ...
Loading... F:\PROJEC
TS\CADENCE\G120\NETLIST/pstchip.dat
- {# T/ \" M" `; @3 |( V#34 WARNING(SPCODD-34): Expected ';' character on line 1078. Check the name and value syntax for invalid characters in the primitive definition before the line number.
              ERROR(SPCODD-47): File F:/PROJECTS/CADENCE/G120/NETLIST/pstchip.dat could not be loaded, and the packaging operation did not complete. Check the pxl.log file for the errors causing this situation and package the design again.
#53 ERROR(SPCODD-53): Packaging cannot be completed because packaging has encountered a null object ID. The design may not have been saved correctly. Save the schematic and rerun packaging.
, \, G1 J: [9 f: K: V+ U6 @#17 Error   [ALG0036] Unable to read logical netlist data.
Exiting... "C:\Cadence\SPB_16.2\tools\capture\pstswp.exe" -pst -d "f:\work\g-plus\g120\sch\g120_allegro.dsn" -n "F:\PROJECTS\CADENCE\G120\NETLIST" -c "C:\Cadence\SPB_16.2\tools\capture\allegro.cfg" -v 3 -j "PCB Footprint"

*** Done ***
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* q' n# g" [  p& v: D9 P' q( T比如说:#1Warning [ALG0016]中的错误，我原理图中的Part Name 根本不是 "BATTERYCONNECTOR_3_KBC23S3M_R_BATTERY_CONNECTOR"如图1所示。字符总数根本没有超过32个，不知道这个Warning是什么意思！

其中网表也还有一些其他的错误！请各位帮忙解决一下！
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谢谢！

whb3103536

( f8 T! c  \8 y& A. B$ Y- i
# Y7 v; c6 D$ j- j0 }6 K: _还有一个问题想请教大家：
一般在用Capture CIS 转Allegro网表时大家用telesis.dll文件还是直接转成PCB EDITOR格式呢？哪种格式会好一些？

' j6 u$ _! N5 f7 |& C6 W" H9 ]. C我现在用telesis.dll格式转的话，就没有上面这个网表错误!
请知道的朋友说一下!
" e) z- q, M% Q8 ~& x: G谢谢！

n042208

关于那个警告问题，你可以不用关心，它是Orcad在转网表时的命名规则问题，命名时不只是原理图中的元件名，它还包括了封装的名称以及Value值，超过31个字符后，系统会自动截取31个字符，这不影响结果，可以不用关心

Laden

楼主 问下你的问题解决了吗？我遇到了和你一样的问题
#53 ERROR(SPCODD-53): Packaging cannot be completed because packaging has encountered a null object ID. The design may not have been saved correctly. Save the design before packaging.
9 P* F! o' m( S3 V: ~* H咋么解决？