|
|
EDA365欢迎您！
您需要 登录 才可以下载或查看，没有帐号？注册
x
本帖最后由 auto1860 于 2017-7-3 15:25 编辑 9 m$ f# M B2 l% L5 H2 {% Q
* c+ e; X, b, w/ C
Fixed CCRs: SPB 17.2 HF022
. v, }5 F, c l: r, _06-16-20179 X3 p6 L# Q- F+ e7 ]" F8 s+ U
========================================================================================================================================================3 G* M, E+ k0 f3 v7 R0 X6 o5 l
CCRID Product ProductLevel2 Title
; X/ N% t" k+ o========================================================================================================================================================: `, m1 G5 z O, E+ u+ [* t4 }
1755789 ADW DBEDITOR Checking in HSS Block returns 'Failed to create archive'
( }5 {$ ^% X6 |9 \3 W1731459 ADW FLOW_MGR Cannot open LRM from Flow Manager
: }( P z- Q, ?8 x1731460 ADW FLOW_MGR Cannot open LRM from Flow Manager) r4 }5 Y% S7 \/ Q/ b4 W: p* Q
1744081 ADW FLOW_MGR Error regarding configuration file when trying to open Workflow Manager
* D/ t' Q3 U( F7 V3 y1756727 ADW LIBIMPORT EDM Library Import fails with java exceptions when merging classifications
. @ ?, T' O! U: L0 @' i# e* V$ N, ?1743763 ADW SRM Find filter is grayed out when Allegro PCB Editor is opened from EDM Flow Manager ]; c" s @3 U8 t b/ j
1748399 ALLEGRO_EDITOR DATABASE In release 17.2-2016, end caps not visible for certain clines in PCB Editor
# V& q* c( r* D: c1 u2 E4 E1748522 ALLEGRO_EDITOR INTERACTIV A component mirrored using the 'funckey' command jumps to (0,0) position when the 'move' command is used on it
- S! H! D5 h# A ]$ l9 c1734983 ALLEGRO_EDITOR INTERFACES Secondary step model does not stay mapped after drawing is reopened, ]4 F) T# [4 X$ U# E1 J* P
1753704 ALLEGRO_EDITOR REFRESH Refreshing symbols crashes PCB Editor
5 L2 x. `0 K9 \5 h* B# X/ }4 R/ m1493721 ALLEGRO_EDITOR SHAPE Voids on negative planes are not adhering to constraints+ B3 @" \9 _3 t( y# h
1711242 ALLEGRO_EDITOR SHAPE Route keep out leads to partly unfilled shapes with gaps
$ G$ M" T, z! o; B* r, K1726865 ALLEGRO_EDITOR UI_GENERAL Pop-up Mirror command does not mirror at cursor position- c% S2 U7 o+ R: r) O! F
1752987 ALLEGRO_EDITOR UI_GENERAL axlUIViewFileCreate zoom to xy location not working while in user created form.
) M2 V% P- j1 F2 u: m: p' P% @, C" E. ~1755638 ALLEGRO_EDITOR UI_GENERAL In release 17.2-2016, zoom operations using mouse button not working when axlShellPost() is run) n7 @! k. p5 ^3 v: Z" B7 n
1719792 ALLEGRO_PROD_TOOLB CORE Productivity Toolbox Z-DRC hangs or crashes PCB Editor( g; P; _- i1 A0 C3 w: z. G6 B% B
1624869 ALTM_TRANSLATOR CAPTURE A structure file is required to translate a third-party schematic to OrCAD Capture
" M/ C0 J/ S+ F# E! y, m7 \1707416 ALTM_TRANSLATOR CAPTURE Missing components and pins in the OrCAD Capture schematic translated from a third-party tool3 J& J% | Z1 k- [$ \% ^
1708825 ALTM_TRANSLATOR CAPTURE The third-party translator fails to translate the schematic
; j2 B" w7 l8 e1 a# n' u1719200 ALTM_TRANSLATOR CAPTURE The third-party translator fails to translate all the pages of a schematic
" x1 B; b9 J3 M/ Y1546070 ALTM_TRANSLATOR CORE Third-party to DE-HDL schematic translation fails
) S) M0 C9 @. P( \7 G" Z% c1700508 ALTM_TRANSLATOR CORE Third-party PCB translator does not work in release 17.2-2016
: } J& m" g3 G B) P: w+ T1699340 ALTM_TRANSLATOR DE_HDL Unable to import third-party schematic into DE-HDL using Import menu in PCB Editor! l$ Y1 c5 c2 O6 x7 h0 l9 |3 e
1630379 ALTM_TRANSLATOR PCB_EDITOR Third-party translator is not importing clines and vias
: a. @* U! t8 I% Z- ^! k1708615 ALTM_TRANSLATOR PCB_EDITOR All items of third-party PCB not imported in release 17.2-2016: k9 r8 U: J8 V, Z9 S: ?0 Y5 i4 K
1758296 APD DXF_IF DXF OUT: Rounded rectangle pads mirrored incorrectly
, t o6 A$ v7 j H! B" @# }2 @. E1756040 APD IMPORT_DATA The 'die text in' command ignores values after the decimal point
; s* l/ |9 D6 l& s8 E! o; u1727206 APD SHAPE Merging two shapes results in an incorrect shape- H2 D" x( G! z2 G0 y! f2 H9 f4 Z
1753682 CONCEPT_HDL CONSTRAINT_MG Constraint Manager stops responding while cross probing DE-HDL6 T5 b+ X! u: }( W i3 w
1721334 CONCEPT_HDL CORE dsreportgen not able to resolve gated part on schematic# x- X+ ^1 @9 ~% g! G
1747559 CONCEPT_HDL CORE Copying a logic symbol without a part table entry results in ERROR(SPCODD-53) P. t' @: b( }" E1 N( B' v
1749644 CONCEPT_HDL CORE In release 17.2-2016 Hotfix 019, 'align components' is not working on Windows 8 and DE-HDL crashes: | H+ z2 T% r1 N Z0 i
1746910 CONCEPT_HDL GLOBALCHANGE Global Component Change unable to identify part data when using schematic pick option7 `8 k# I' u7 N+ W
1743572 FLOWS PROJMGR Project Manager displays incorrect values in Project Setting
" J, R+ |6 X. j/ @" W4 L4 i1724124 FSP DESIGN_EXPLOR Provide TCL command to filter design connectivity window% t* q( M" |5 `
1719105 FSP GUI Tabular sorting not working in FPGA System Planner9 e( F# o% s( i- H+ P
1755750 PCB_LIBRARIAN GRAPHICAL_EDI In release 17.2-2016, unable to delete _N pins in PDV Symbol Editor
( B- j1 @: m2 f {1722993 PCB_LIBRARIAN IMPORT_CSV Part Developer crashes while importing part information stored in a .csv file
$ Y. F9 T- {9 X9 T" g1758856 SIP_LAYOUT 3D_VIEWER Correct the spelling error in the 3D Viewer Design Configuration window+ r9 R. y4 M; ]4 {
1755179 SIP_LAYOUT ARTWORK PCB Editor crashes when creating Gerber files/ h: {( Q* ~+ {( b l
1743511 SIP_LAYOUT MANUFACTURING Package Design Integrity shows non-redundant padstacks in the Redundant Padstacks check( b4 w$ V8 D% y' M3 X2 l9 X; J$ Y
下载链接* X# O) D" F/ I8 y, j2 t& C
2 a* d+ @5 R* C- f" ]% s7 t
* v. Z( N; @# j |
|
[复制链接]
/1 
发表于 2017-6-29 13:23
QQ好友和群
QQ空间
腾讯微博
腾讯朋友
微信
收藏
支持！
反对！
; ` o$ R* \- @6 E0 C; X1 V3 ^
