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本帖最后由 超級狗 于 2013-5-29 15:35 编辑 ' n s6 t: R+ O0 a% z3 ^
' S, c5 n$ r3 k* e" v& g: B信者恆信,不信者恆不信。5 U9 f d2 t* M$ D ~- z
9 b+ k5 _: p$ X; \. E其實,這個問題兩年前有人問過我,輾轉問過很多人也都沒有答案,當時上網找到一些討論回覆。/ s' q2 u- @- S6 w
- y2 S* _& u, o5 I+ XThe reasons not to connect pins to power or ground directly:; N& U! `6 u& k/ r/ b x8 Z
- A short to ground is likely to occur. It exceeds rated source/sink capability (or the combined source/sink capability of the chip).
- The cost of the resister is minimal to beginning projects. I have found that the last minute design change or feature addition is the rule rather than the exception. I ALWAYS allocate space to bring out every pin used or not. Getting inexperienced people in the habit of placing that resistor makes them better prepared for the reality of EE life. Experienced production personnel can weight the pros and cons and most likely already have decided what to do. A large value resistor, even left in place, will not prevent the pin from being used if the production boards need a feature added by hand later.
- Stops gate voltages rising faster than any internal supply rails for any devices that can latch-up and so prevent an occasional failure due to bond wires melting. Latch-up is a danger in chips that have parasitic thyristors as an artifact of the manufacturing process. Most modern chips do not have this problem but its best to be safe.
- Reduce ESD spikes, brownouts, lightning crashes, screwy things related to general susceptibility, etc...
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6 A/ E' F$ A6 J4 j' W" {% A「討論板」顧名思義就是,大家能藉由討論提昇自己的技術層次。別人講的不一定是對,但我們能透過相互的討論,學習到更新的知識,更正以前錯誤的觀念......。
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我之所以說「可能」是因為,自己也知道有些人不會認同這些答案。但對於沒有更好答案之前,個人是願意去參考這些解釋。 U4 y+ _$ A% g# o; t: W
, {8 S/ w. ], a# U' C' b. e並不是工作上所有的問題,都能得到合理的解答。但憑藉反覆的辯論及思考,也許有一天我們能得到一個滿意的結論。
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這也不是每一個從事科學或技術領域的人,一生所追求的目標嗎?- X! D: j% G7 S: F5 Q3 @; {% W
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