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Cadence Allegro version 16.5 . M# {6 [3 |( V+ @' `' B1 ]
At the end of May, 2011, Cadence Design Systems will release the 16.5 version. ) u& X+ W& P( D V
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The 16.5 version of the Allegro family of products offer new product bundle configurations, which provides more cost effective solutions to the users. A huge mount of new features are added to the Allegro family. In addition a brand new power delivery network analysis tool is introduced. ; a# c9 |$ I$ \
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A significant change is the transition from hierarchical product bundles to application specific product packaging. The Allegro technology is now available in a very powerful base configuration with the ability to add application-specific options.
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3 k+ x, M2 x- ]( W4 `# g2 y5 q, o7 lThe additional application specific options are:& Z) x( s4 ]) H7 S7 t" [
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Team DesignMultiple designers can work in parallel with one PCB.
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Analog / RF DesignAccess to analog and RF design capabilities.
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! x9 P+ `2 m% R& _+ |$ GHigh SpeedAbility to define and analyze advanced electrical constraints.) S$ R3 C' _! r; @8 F4 w% [
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MiniaturizationAdvanced via management on PCB with HDI and embedded components.3 O: k/ c. d ~1 J( g
, N$ A3 T8 A* n5 ^5 k! VPCB RoutingAutorouting with respect to advanced electrical constraints.
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8 r! q. L" Z# N% e) kPCB Interconnect Design PlanningA new design tool, PCB Interconnect Design Planning, which radically shortens the time for routing of complex PCBs with many buses.
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New features in Allegro 16.5:
- |% j$ y( H" F* l8 {$ {. C- Dynamic Design for Assembly.
- Interconnect Flow Design.
- ECAD-MCAD Co-Design through incremental EDMD.
- Snake-routing
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Support for Windows 7Release 16.5 are fully supported on Windows 7, 32 and 64 bit systems.% e2 p: m u/ D# m2 x& t" S1 [
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发表于 2011-5-29 09:57
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