SDR新书：Baseband Analog Circuits for Software Defined Radio

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SDR新书：Baseband Analog Circuits for Software Defined Radio


% J. `( q8 P$ h! C) GAuthor:

VITO GIANNINI
* e: h: ~3 g% T, r8 d# S, R2 Z' lJAN CRANINCKX
7 |/ N- T6 _3 `ANDREA BASCHIROTTO
IMEC, Wireless Research, Leuven, Belgium
IMEC, Wireless Research, Leuven, Belgium
University of Salento,  Italy
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5 P; ]5 z* E7 v) V3 a" PContents
Dedication v
Preface xi
Acknowledgments xv
( g5 n! z, e( r! A1. 4G MOBILE TERMINALS 1
% U# W, o) n& d. x1.1 A Wireless-Centric World 1
1.2 The Driving Forces Towards 4G Systems 3
1.3 Basic Architecture For a 4G Terminal 6
1.4 The Role of Analog Circuits 8
1.5 Energy-Scalable Radio Front End 9
1.6 Towards Cognitive Radios 11
2. SOFTWARE DEFINED RADIO FRONT ENDS 13
2.1 The Software Radio Architecture 13
! R5 `4 ~6 Z' x/ S0 l2 `* v+ t2.2 Candidate Architectures for SDR Front Ends 16
2.2.1 Heterodyne and digital-IF receivers 17
2.2.2 Zero-IF receivers 19
2.2.3 Digital low-IF receivers 22
+ H( m$ O0 X6 v3 f6 \2.2.4 Bandpass sampling receivers 24
4 a( H  X# D6 ?. O/ q2.2.5 Direct RF sampling receivers 26
# n; X- @5 C" Y/ s2.3 SDR Front End Implementation 27
0 B/ C2 |- W' s3 ~' d2.3.1 LNA and input matching 29
2.3.2 Frequency synthesizer 30
2.3.3 Baseband signal processing 31
3 [# C5 `! X) O! j4 h8 P6 R2.3.4 Measurements results 31
2.4 Digital Calibration of Analog Imperfections 33
! m$ t: q* d) b! b& ?0 F2.4.1 Quadrature imbalance 34
2.4.2 DC offset 36
- s$ W6 f5 L1 Y7 m' }0 I0 Gviii
6 f: x. z* `9 q0 n" `Contents
2.4.3 Impact of LPF spectral behavior 36
2.5 Conclusions 37
2 N( @6 E9 \. v0 E2 R# [8 D9 Z3. LINK BUDGET ANALYSIS IN THE SDR ANALOG
. F% U5 G3 S' Z3 RBASEBAND SECTION 39
3.1 Analog Baseband Signal Processing 39
3.2 Baseband Trade-Offs for Analog to Digital Conversion 40
3.2.1 Number of poles for the LPF 41
! h0 S1 |" ]0 ]1 V  {/ c6 h! l3.2.2 ADC dynamic range 42
3.2.3 Baseband power consumption estimation 47
3.3 Multistandard Analog Baseband Specs 48
* W9 x# e0 Y) i, x& R5 a3.4 Multimode Low-Pass Filter 49
5 w- ~, h/ C( j) t- c- k3.4.1 Filter selectivity 50
3.4.2 Filter noise and linearity 54
% Y8 k( V6 q. H% l7 s) w7 k0 F3.4.3 Filter flexibility planning 56
  G% n$ ]( f; V; d3 S7 i3.4.4 Cascade of biquadratic sections 59
3.5 Automatic Gain Control 62
0 D$ u3 x* w- Q8 V! ?3.6 Conclusions 65
4. FLEXIBLE ANALOG BUILDING BLOCKS 67
# y) Q! \. c& ~4.1 Challenges in Analog Design for Flexibility 67
7 r0 R! B2 o/ Y5 v" K3 |4.2 A Modular Design Approach 68
7 ^+ Y) C5 N7 Q$ q& E4.3 Flexible Operational Amplifiers 70
0 \# ^" k4 d) I) T& |$ ]4.3.1 Variable current sources 70
4.3.2 Arrays of operational amplifiers 71
4.4 A Digital-Controlled Current Follower 75
6 D8 _5 O: H" q6 X/ }4.5 Flexible Passive Components 75
4.6 Flexible Transconductors 77
4.7 Flexible Biquadratic Sections 78
- M1 f) K0 O& K' @9 H4.7.1 The Active-Gm-RC biquad 79
4.8 Conclusions 91
) [/ p$ D. ~. [$ U) D3 v; g5. IMPLEMENTATIONS OF FLEXIBLE FILTERS FOR SDR
. e. {1 Q7 l" W4 t; MFRONT END 93
* l' ]' k  K+ ?' [, A* a5.1 State of the Art for Flexible CT Filters 93
3 Q% O- c8 s2 a, Y  {) ]  z: w. D5.2 A Reconfigurable UMTS/WLAN Active-Gm-RC LPF 94
5.2.1 Filter architecture 96
- {( E2 Q% B  k, C% M2 Z5.2.2 Automatic RC calibration scheme 97
5.2.3 Measurements results 102
) m4 {4 x6 ?, Y' RContents
6 J0 u6 o2 {6 w" A& S1 six
/ U  Y5 V+ s  G5 m- [& k: m5.3 LPF and VGA for SDR Front End 105
5.3.1 LPF and VGA architectures 107
, q3 l" q  ?5 j! Z7 w, A- o; ]5.3.2 Prototype measurements 111
5.4 Conclusions 118
) |3 T2 o# S6 b1 ~) @2 l/ ^- yAcronyms 119
) H7 |2 L9 V- P# V2 x% GList of Figures 123
3 Z% j! O8 i( n; z5 t# xList of Tables 129
2 U. f! X0 o6 d8 n$ {References 131
: T$ u- l! P0 _$ D7 K' oIndex 139
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