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在 Logic与Layout 导入时提示以下内容怎么解决?
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. w3 ~3 Z7 S R/ lDatabase Integrity Test Report on file SPS.pcb -- Sun Jul 08 13:53:46 2012
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* @; s- D4 G! y _. N# rERROR: Component R11 (Id: 10) has box outside design space
' P G; X# R/ p( q (-16002.5, -16019.72) (65, 45)" t2 v0 Z) }3 ?3 e$ U: u
' C5 J! S' U3 u' BERROR: Component R4 (Id: 15) has box outside design space. y% J7 y# Y4 s% O3 h! k
(-16002.5, -16019.72) (65, 45)
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ERROR: Component R5 (Id: 17) has box outside design space; z- a. }' @7 p* F" u6 h3 m9 c
(-16002.5, -16019.72) (65, 45)0 g7 M; F' e. J3 K& k
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ERROR: Component R8 (Id: 24) has box outside design space7 Q2 h) @; |2 f" B7 I9 k
(-16002.5, -16019.72) (65, 45)' Q% n6 c) L+ z8 u Z1 d5 R
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