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在PROTEL里画的PCB图转到ALLEGRO里面是出现的问题?

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发表于 2009-3-23 14:33 | 只看该作者 回帖奖励 |倒序浏览 |阅读模式

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在PROTEL里画的PCB图转到ALLEGRO里面是出现如下问题Layout To PCBEditor   Version 15.7.0- Y! M: ~# y; J# q( H
Copyright 1985-2006 Cadence Design Systems, Inc.# |6 A% I  C" \9 c/ \+ q
WARNING (Layout To PCBEditor), Duplicate pin names were renamed in footprint 'BUTTON148'
/ B( T+ \$ h' R3 ^- d; p2 LWARNING (Layout To PCBEditor), Duplicate pin names were renamed in footprint 'TS5169'5 v/ Q7 f# A; ]. j. u
WARNING (Layout To PCBEditor), Duplicate pin names were renamed in footprint 'BUTTON148_S1'6 `  h; i. P9 S
WARNING (Layout To PCBEditor), Duplicate pin names were renamed in footprint 'TS5169_U22'
/ K$ _; L: l: M6 h% rWARNING (Layout To PCBEditor), Netname 'SPI2_MOSI' was discarded because it is not used by any component pad( p, W4 h4 s1 q, R- {
WARNING (Layout To PCBEditor), Netname 'SPI1_MISO' was discarded because it is not used by any component pad
0 V$ m- f% i/ @. s- V: x7 rWARNING (Layout To PCBEditor), Netname 'I2C1_SCL' was discarded because it is by any component pad, k6 ^8 {; U5 m4 \3 y! K5 j
WARNING (Layout To PCBEditor), Netname 'SPI1_NSS' was discarded because it is not used bynot used by any component pad
9 D" [% X  E# P" L+ F$ v0 qWARNING (Layout To PCBEditor), Netname 'I2C1_SDA' was discarded because it is not used by any component pad' r- L3 k9 R, s
WARNING (Layout To PCBEditor), Netname 'I2C1_SMBAI' was discarded because it is not used by any component pad( {& W* `# L' a5 x1 k2 k4 c2 k( m  t
WARNING (Layout To PCBEditor), Netname 'I2C2_SCL' was discarded because it is not used by any component pad
+ d% ~1 Q2 O& S+ f& d, q% ^7 wWARNING (Layout To PCBEditor), Netname 'I2C2_SDA' was discarded because it is not used  any component pad
; }/ e1 p+ I% Z" \8 q9 J3 y9 bWARNING (Layout To PCBEditor), Netname 'SPI2_NSS' was discarded because it is not used by any component pad2 ?' Y1 }4 B7 v' y$ ^7 b: B4 C! w0 {
WARNING (Layout To PCBEditor), Netname 'USART1_RX' was discarded because it is not used by any component pad3 d! \# `: \! R* e- |3 r4 ~. I
WARNING (Layout To PCBEditor), Netname 'USART1_TX' was discarded because it is not used by any component pad
5 g5 c. C' a, P. M/ t* xERROR (Layout To PCBEditor), Padstack '56' is malformed on layer 1) e2 @& y$ i% G- y: _
Netlist Warnings and Errors recorded in 'E:\TEST\netin.log':
- T  \5 ?' h7 Q; `& t4 A7 Z" r( r+ O0 n7 \( p
Translate time 1 seconds2 U7 f. I! r- j2 A0 V

9 A) M, Y" q; s6 ]$ G" R! H# o6 i, B3 U1 F; W& q
请高手解答一下是怎么回事呢?
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发表于 2009-3-23 22:03 | 只看该作者
估计是你的库和封装 没有导好..

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发表于 2009-3-23 22:08 | 只看该作者
Protel DXP在输出Capture DSN文件的时候,没有输出封装信息,在Capture中我们会看到所以元件的PCB Footprint属性都是空的。这就需要我们手工为元件添加封装信息,这也是整个转化过程中最耗时的工作。在添加封装信息时要注意保持与Protel PCB设计中的封装一致性,以及Cadence在封装命名上的限制。例如一个电阻,在Protel中的封装为AXIAL0.4,在后面介绍的封装库的转化中,将被修改为AXIAL04,这是由于Cadence不允许封装名中出现“.”;再比如DB9接插件的封装在Protel中为DB9RA/F,将会被改为DB9RAF。因此我们在Capture中给元件添加封装信息时,要考虑到这些命名的改变。
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