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Traslation stopped due to errors listed in the log files7 A$ C Y( X3 x5 m* Y) H
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; h. O3 T% F/ Mlog files:
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9 A1 ~8 N. d- @1 M5 t
. Y/ ?2 B/ g. F+ c# y* O% `Translating E:\Temporary_lib\default.asc.2 h- p- i: T4 P# y) i; I
Using translator version @(#)$CDS: pads_in.exe v16-3-85CK 9/12/2011 Copyr 2011 CADENCE DESIGN SYSTEMS.2 U3 z; G' L, I# k0 i% Q- c! v
Reading PADS ASCII file header.5 e: E& @4 i3 I/ q
Version = PowerPCB2007.0. j0 C2 L/ r7 z- H K2 @5 E4 A
Route Layers = 2
/ F, K7 o) V4 j8 i9 [" x$ S: c Units = MILS
/ L$ n1 F+ S6 F6 k! y; X9 P Hatch mode = Vertical / Horizontal- b' ]9 t" J: L3 E4 d
Hatch grid = 10.000000, angle = 0.000000, anti-pad spacing = 0.000315
( u' _! M H& b) H. l! LInitializing new database.! m1 J5 {% y$ X! d
Creating layers.0 b) }1 |3 C0 q& y; z# m6 I
Reading PADS ASCII file body.1 u1 `1 E) E. j/ W+ {
*MISC*
, q+ s- d( z$ Y) E+ [+ T" r& m3 o *MISC*
0 `$ L/ S* x% R2 Y8 W( T7 NInformation: CSet 1_2_3 renamed to DEFAULT
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Warning: Allegro doesn't support default electrical CSets.
% a3 V1 v# r; k8 Z9 x* Q5 I Please assign electrical cset DEFAULT to the objects manually.
! S4 A0 w5 V# u e( j) s *MISC*4 V1 [; X! O2 @% H& V
*MISC*8 t" n8 w9 D, _) `* H7 k" K+ j3 f
*MISC*
$ F! Y. R2 \) d7 _) g' A" {6 p1 RERROR: Parse error on line 3962.1 w$ k: @* l3 O0 Y- c e
. F# e) n9 ^; m$ r ]- J8 s0 ?' t4 ^ERROR: Finished with errors.
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发表于 2014-4-10 10:11
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