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Hotfix中只需要安装最新的版本即可。
% u; X: z1 W, E" k. vHotfix024对以下项目做了修正：
4 W, P/ U: \" \+ ]DATE: 06-20-2012 HOTFIX VERSION: 024
3 Q9 H8 A% E; J6 ^5 H- w4 m5 {===================================================================================================================================
/ s4 A. w2 v" @" [; G& ]! j' \CCRID PRODUCT PRODUCTLEVEL2 TITLE K# R6 X/ X7 o$ O& V6 }. x
===================================================================================================================================4 z1 P5 B! ? h. y: }6 V6 u
982824 ALLEGRO_EDITOR OTHER Import placement fails with a zero length log file.
/ _) k" h [% y0 A; h1006437 SIP_LAYOUT BGA_EDITOR SCM not loading the die if dies refdes and LFnames are changed4 w( X) c$ @) x5 A% r+ c
1011040 FSP PROCESS Feature to avoid connectivity between fixed voltage Output and variable voltage Input
1 b& Y- i9 f7 u( d1012985 ALLEGRO_EDITOR DATABASE Allegro crashes multiple times a day
9 I( _: i+ W+ \* @$ e4 s1013644 ALLEGRO_EDITOR SHAPE Sliding trace with oops creates a duplicate shape islands" H' P: @. I) M/ I
1014351 ALLEGRO_EDITOR OTHER Whenever we open a file (brd, dra) in PCB Editor with an OrCAD PCB Designer license,we get a warning SPMH0D-34; o! D2 f- Z- Z1 w, i- N0 {
1014893 CONSTRAINT_MGR OTHER With CM open layout is extremely slow and Allegro crashes very frequently; T( p1 }0 J. j% w' F% e% p
1015210 ALLEGRO_EDITOR DRC_CONSTR Deleting Via from an array casues DRC errors: {; u6 G5 \$ U& T
1016546 CONCEPT_HDL CONSTRAINT_MGR Wrong value of NET_PYSICAL _SPACING_TYPE in Attribute form
- B% F8 P0 G: u5 J1 o) t; O* J" h1016932 RF_PCB DISCRETE_LIBX_2A Incorrect Symbol Pin Numbers after import into ADS
# E& J& @- `, M1017332 APD VIA_STRUCTURE Refreshing Via Structures results in shorting to power plane.
4 |6 s$ F& @4 w% K! {8 F1017931 ALLEGRO_EDITOR OTHER IPF import fails with error-IPF error : Illegal pen number
! ~' s; r5 k p, `7 ~% G1018413 F2B PACKAGERXL Export Physical producing different results depending on how it is launched, ~4 Y( l3 ~4 n1 q8 ?/ Z( u
1018435 APD OTHER Oblong pads in Sip are not displayed correctly in the Stream_out .sf file.
# p% K( x- M. i; ]* Z1018936 ALLEGRO_EDITOR OTHER unexpexted DRC eror% }& O" W7 d2 A. W3 j' m* T
1018978 ALLEGRO_EDITOR DRC_CONSTR Update DRC changes DRC without any change in design
( Y1 r0 }3 u2 h& Z1019303 CONCEPT_HDL INFRA DEHDL custom outport displays error1 W- o: o7 }0 a
1019913 ALLEGRO_EDITOR DATABASE BUG:Bottom pins are also shown in DXF export7 G7 T& r; k* e; u) G3 `
1019955 ALLEGRO_EDITOR SKILL axlRegionCreate and axlRegionAdd do not work in a symbol file.
4 J8 d' k9 a1 V1020749 ALLEGRO_EDITOR DATABASE 16.2 Parts not updating when opened in a 16.5 database. E* @% w2 V1 A! M, T2 R
1020780 APD COLOR APD crash on assigning color to net using Color192
3 G& J. `& k7 U- s% I3 n4 Q5 s! a1021033 CONCEPT_HDL CONSTRAINT_MGR Cleared ecsets in 16.3 reappears as mapping errors without ecset names after uprev to 16.5 |
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发表于 2012-6-23 10:23
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