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Packager" P* ?& T+ f. G; |+ K7 @8 y4 k
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4 ^2 \6 u! ~; `/ {% @) P( L# M 09:11 PM Wednesday, March 18, 2009! _9 ]9 f/ a k/ E1 \6 S Z8 c
Job Name: F:\新建文件夹 (2)\rfsdfdsfsf\rfsdfdsfsf.prj$ U1 A4 c0 ~" i2 R, Z7 ~
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Packager Version: 020806.00# M& C+ V, i. |& L! H
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Commandline is: "C:\MentorGraphics\2007EE\SDD_HOME\wg\win32\bin\Package.exe -j"F:\新建文件夹 (2)\rfsdfdsfsf\rfsdfdsfsf.prj" -n"Design1" -Add "! c# p8 Z' J) {6 h2 s6 b
! p% d, u6 n7 j" N' |% x& R, c The Common Database is at "F:\新建文件夹 (2)\rfsdfdsfsf\database".
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5 O, s* ?1 V6 X4 ~ The Root of this design is "Schematic1".
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The Front End Snapshot of this design is "DxD".4 h% H7 ^. W8 o* @6 ` H$ U
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The PCB Design Path of this design is at "F:\新建文件夹 (2)\rfsdfdsfsf\PCB\Design1.pcb".
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The Central Library is at "F:\新建文件夹 (2)\EE2007_DX-Expedition.Central Library-o\EE2007_DX-Expedition.Central Library.lmc".- N7 y, o' R1 k" D2 q
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Unable to determine the Disable Repackage status.
, c) h) d! f k. j !Repackaging will be allowed!
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& `' _# J9 P5 F$ u The PDBs listed in the project file will be searched to satisfy the parts
; x0 m- ^# P0 N& _/ ]4 n requirements of the iCDB only for parts not already found in the: ]# F$ M& \: w0 j! u* Y
Target PDB.- i4 k0 O: F) ?( D: B
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The AllowAlphaRefDes status indicates that reference* D, R x+ ~, Y- J4 \
designators containing all alpha characters should be deleted4 u) V7 o& S; h M4 P# W% v
and the relevant symbols repackaged.* g- n w1 T: t( j. G
9 B# E, G9 J' h4 @( W, N& @& v# Y The cross mapping of symbol pin names to Part Number pin
5 \' a0 {7 K6 ~: `* e. w0 O# { E numbers will be checked for packaged symbols and mapped correctly+ ]% m. N9 j1 W. K3 `! n5 N
for unpackaged symbols.9 O* D! I; }) E8 ^ [( e& }
, S& [7 g2 D4 F- u% R, @" x Properties that have been checked off in the Property Definition Editor
( M4 U0 \& H$ H; a/ T found at Library Manager/Common Properties will be checked for value
0 S8 S$ d+ A% K7 M. l( S8 x3 o differences between the PartsDB and the non-null properties on symbols.
) ~* R4 a( ? ^ Those properties checked off (other than Part Number)- y* [1 L& _9 j; k6 q. M" [# @
will not be transferred from the PartsDB to symbols.
+ ]1 q) q. g% Q) A" @; J The following properties were checked off in the Property Definition Editor:
; D# d/ `( t1 M* G9 _) d/ Y: ~ "ICX_PART_MODEL"
5 n! \4 O7 X# T- M "Spice Lib Name". M. ]3 K2 w; z& p
"Spice Subckt"
7 ^9 r4 [, s4 J' ? "Spice Lib Path"
( k9 q7 t9 w, \" t+ E; |8 R "Use Verilog"" y! M/ K) G# U4 A% }1 `
"Probe" P3 `" Q6 B; y7 }; m6 P
"Prefix"% n6 i; k- V! H2 ~3 i: b: Z( b7 j3 Z
"PARNAM"
9 _& f. K& I; F- K9 v1 L& ?, b "Order"
% N1 f H Y H/ B1 _$ P "No Pins", ^3 l; z8 I$ }+ Z4 F3 a" ]' Z& D8 I/ ^
"Model"
% m5 e( G* P9 H% g3 C1 p "Load"1 a- q5 J1 k: z2 [- s" W
"LIBRARY"
& O# T S ] X( x) o& p# { "Generator"( Q) A: |& x6 ~% k
"File"& \$ x$ F7 K+ G: M2 w$ y, j
"Bulk"4 [" I) w/ T+ Z
"ADMS Library"
0 O, h% P8 I, C. H "Parametric"
! B+ C' I# E; l, R5 M "Value2"+ {/ F; C" a5 |/ @
"Tech"
8 r5 t' c, @( E4 w0 T* f "IBIS" N5 z; K, v& N" b( m' k3 p- Z1 g
"VHDL Model"
0 T: ^5 o% j* e "Verilog Model"
. a& R, @( A+ Y4 f ~$ M/ o; ^ "Simulation Model"
# {$ {7 R2 U% R/ _3 }& _- N# @" N2 V "Value"% f; U# x- y/ Y) i$ T6 W2 Q
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Common Data Base has been read0 J6 P" R9 q$ x o; Q
8 G9 m6 G4 h& B2 w' m6 A: x Target PDB Name: Integration\LocalPartsDB.pdb
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& b+ _3 Z, O2 S, M, X. x ERROR: Unable to open Source Parts Data Base F:\新建文件夹 (2)\EE2007_DX-Expedition.Central Library-o\PartsDBLibs\Module-Through.pdb for reading.3 i% m1 r3 E& `; T! T
Suspending getting parts by Part Number.
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ERROR: Unable to create local PDB
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ERROR: Problem Making Local Parts DataBase
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: G* X; |+ N: z j8 Z+ h/ c Testing of Packaging is being terminated with 3 errors and 0 warnings.
3 t6 ]/ B1 G4 A2 y- t Design has NOT been packaged.1 F2 {- Q y; B6 V
) q; e4 m* c* |0 h( C9 p7 H There have been 3 errors. |
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发表于 2009-3-18 21:15
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楼主
发表于 2009-3-19 18:36
