Since the earliest days of microprocessors, system designers have been plagued by a problem in which the e% n. D& j7 S6 J; Wspeed of the CPU's operation exceeded the bandwidth of the memory subsystem to which it was connected. # r7 ?" b) p/ n% Z& LTo avoid wasting CPU cycles while waiting for the memory to fetch the requested data, the universally * f% I# s. E9 E# I( B$ ?adopted solution was to use an area of faster (and thus more expensive) memory to cache main memory data.6 C+ @+ q# h4 d7 }% }1 p
This solution allowed the CPU to operate at its natural speed as long as the data it required was available in " @. P# E. d* t+ }3 hthe cache.
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发表于 2016-8-22 10:05
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