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Checking for Invalid References
6 s; W. F1 ]5 M6 l+ ?* N" n" k( r6 BERROR [DRC0026] This reference has already been assigned to a different package type. U2: SCHEMATIC1, EP2C20 BANK1 AND BANK2 (4.00, 2.10)
9 J. j' [1 c* d6 PERROR [DRC0026] This reference has already been assigned to a different package type. U2: SCHEMATIC1, EP2C20 BANK1 AND BANK2 (9.70, 2.00) G# W) \# C0 h- G9 U( c: \
ERROR [DRC0026] This reference has already been assigned to a different package type. U2: SCHEMATIC1, EP2C20 BANK3 AND BANK4 (9.80, 2.10)
: M+ L: g5 \7 x0 _8 JERROR [DRC0026] This reference has already been assigned to a different package type. U2: SCHEMATIC1, EP2C20 BANK3 AND BANK4 (4.40, 2.10)
' u1 Q& v5 `; f: u7 B( b6 B, I2 g/ UERROR [DRC0026] This reference has already been assigned to a different package type. U2: SCHEMATIC1, EP2C20 BANK5 AND BANK6 (2.60, 2.30) % }9 h9 F+ e) o7 N5 m5 w; B6 x
ERROR [DRC0026] This reference has already been assigned to a different package type. U2: SCHEMATIC1, EP2C20 BANK5 AND BANK6 (8.00, 2.30) " S$ m- B2 H9 Q( M( z- r) R
ERROR [DRC0026] This reference has already been assigned to a different package type. U2: SCHEMATIC1, EP2C20 POWER AND CONFIG (2.30, 1.40)
8 d: n# T2 R9 {' bERROR [DRC0026] This reference has already been assigned to a different package type. U2: SCHEMATIC1, EP2C20 POWER AND CONFIG (4.40, 6.40) / ?/ b' K+ q P3 J \1 Y# |/ F+ L& d
我调用元件的时候操作方法一样,但只有BANK7 AND BANK8 没有报错,其余几个都报错了.
1 h* m8 Z: Y) D6 \还有就是我在多页原理图中使用分层端口符号，结果报错：5 `- m* k4 t, G" e! a3 _
ERROR [DRC0003] Port has a type which is inconsistent with other ports on the net DRAM_CKE: SCHEMATIC1, EP2C20 BANK1 AND BANK2 (2.70, 4.80) 6 u; F$ F3 A* {+ r+ K
我是在一个电路图上设置端口为output，另一个图上则为input，结果就产生上面的错误，改成一致的就没问题了，但我不明白的是，从原理上说不是一个input，一个output才连接正常吗？为什么都是input或output才可以？我看网上下载的原理图也是一个input,一个output?4 q5 n' ]- W& \. o. J
不知道怎么办了% `# a/ e ]& @" `% y6 H/ r
请教大家怎么修改啊.谢谢了. \7 |, M" E2 s
: a% X3 j# @/ F" j[ 本帖最后由 elmma 于 2008-3-2 13:36 编辑 ] |
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发表于 2008-3-2 11:10
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发表于 2008-3-3 13:00
