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LBSALE[10]LBSALEMIXED-SIGNAL AND DSP DESIGN TECHNIQUES
, l8 C% W* y# \: I$ oSECTION 1
/ T: p0 E5 ?4 ~( @INTRODUCTION4 y' G6 H+ |+ u8 [2 ^3 M9 G' r
SECTION 2
# g! e. o! M" u# WSAMPLED DATA SYSTEMS
5 w* M5 W5 B4 v& w5 M Discrete Time Sampling of Analog Signals
$ ^6 j8 K! y5 d ADC and DAC Static Transfer Functions and DC Errors: J% U ~" D$ y5 t S
AC Errors in Data Converters5 C9 E* p3 o; m/ z) V8 w5 u
DAC Dynamic Performance# A3 ?1 G$ w& i4 O/ _; g d
SECTION 3, `$ q$ z. m0 P ^2 q1 l+ _5 e2 k
ADCs FOR DSP APPLICATIONS
* V5 E, ]6 Q0 [- X Successive Approximation ADCs0 D; [' O5 s k) B7 O1 m! `
Sigma-Delta ADCs
1 a) S6 [ X, s3 X* Q% Q+ }5 {! K5 f Flash Converters
$ H) u; d$ Z* k: X8 E! Z6 @ Subranging (Pipelined) ADCs
0 v8 H/ }% A! h( m9 M2 _ Bit-Per-Stage (Serial, or Ripple) ADCs# F) J" d: v0 b) v
SECTION 45 [ M4 x" l: G; X
DACs FOR DSP APPLICATIONS
% r% h; F. r8 j DAC Structures
8 `/ P: c% K, l! Y2 W; Q( t; w Low Distortion DAC Architectures
; U6 D. Z8 \; |6 M0 I$ S- d2 D DAC Logic! N" g/ Y" \) x, c( a. L L
Sigma-Delta DACs. @4 o2 W; Y8 A7 Q! W
Direct Digital Synthesis (DDS)+ m: P8 r8 b# ?" {6 B' x2 \
SECTION 5 V1 v! @. |, r8 P- {7 Z3 _
FAST FOURIER TRANSFORMS9 ~8 ]9 l4 x3 K' C2 r0 A/ f& j
The Discrete Fourier Transform4 ~/ S2 [* r0 T1 E# j; ^+ Z- l
The Fast Fourier Transform
1 u1 b; R, y/ J Z; }- A- u& j( x, Y FFT Hardware Implementation and Benchmarks/ C' p0 V1 q1 u; q8 j/ M* i* W
DSP Requirements for Real Time FFT Applications0 Y$ l' g0 O% y
Spectral Leakage and Windowing
) O( @1 T7 i6 xSECTION 6
3 C: }; ~. K+ X7 \% ?DIGITAL FILTERS
: X% }; V+ g" a9 l+ s8 Q, k, w Finite Impulse Response (FIR) Filters
* s6 V' t7 t# v' H Infinite Impulse Response (IIR) Filters
" J6 a% Q; ^' W4 o0 w y m0 [ Multirate Filters
6 y4 ^+ U' y4 K( y# ^. ]) d! t& o: K Adaptive Filters
! o8 ]/ `2 d; H8 L2 A# A5 ^, K5 ?: cSECTION 7
! Q) l8 Y8 t. T; R8 fDSP HARDWARE* v% m- k/ \) ^) F& z% a: O
Microcontrollers, Microprocessors, and Digital Signal5 b: w2 ?% f8 w4 I
Processors (DSPs)2 U! v+ U/ m# F
DSP Requirements1 i- _( M, L2 A3 x% L
ADSP-21xx 16-Bit Fixed-Point DSP Core
9 X' o7 k ?/ k, |4 E. S Fixed-Point Versus Floating Point
' |6 Q2 U; B8 J, w1 n! q0 q ADI SHARC® Floating Point DSPs( Z: Y" ^# [2 u8 Q
ADSP-2116x Single-Instruction, Multiple Data (SIMD)
g' \/ c( S9 t% ]Core Architecture
, Y$ ^' D8 {1 a TigerSHARC™: The ADSP-TS001 Static Superscalar4 Q' I) m& n* c( ^! Q- ?
DSP: E6 |/ w0 y2 `. G
DSP Benchmarks, S6 j3 \' }, t* V# \
DSP Evaluation and Development Tools5 n6 i/ C# k) ` {" `# L+ x
SECTION 84 {4 r- j- Z; @4 Y7 ], e9 A* o
INTERFACING TO DSPs
# O) n6 p' a: m& m; X" q1 `4 X3 S Parallel Interfacing to DSP Processors: Reading Data
" i/ z0 L: t& EFrom Memory-Mapped Peripheral ADCs
. s# t& Q2 I2 }1 i, j Parallel Interfacing to DSP Processors: Writing Data to) w/ O) b# O0 n: X7 e7 V1 h+ ?
Memory-Mapped DACs
$ l0 n5 n9 u5 O: h( X$ e) ~6 P Serial Interfacing to DSP Processors
! A; K( {$ e4 L1 q8 z! a Interfacing I/O Ports, Analog Front Ends, and Codecs to
& s3 S2 E9 F& r0 o7 Q: C/ kDSPs+ h/ O, v1 c# V# b/ E) s
DSP System Interface/ a* X) E. ?' [2 ]* t' H3 v. A3 u
SECTION 9
/ L, H8 E2 L- A, q/ }DSP APPLICATIONS7 M$ c( M$ F/ h9 p R
High Performance Modems for Plain Old Telephone4 m: l8 y! ^ Z) ]6 D9 l( i) }
Service (POTS)4 j) t& A3 A# G
Remote Access Server (RAS) Modems8 g; ^% C' S7 V% H R' g
ADSL (Assymetric Digital Subscriber Line)2 v6 Y/ E' ^9 ^, Q
Digital Cellular Telephones
% R/ H3 ]% h$ G% P/ S GSM Handset Using SoftFone™ Baseband Processor, ]$ e+ ^) w5 _& |( }7 M
and Othello™ Radio/ R" \+ j3 X/ Y% A U
Analog Cellular Basestations! n( ]4 K+ r# m1 L
Digital Cellular Basestations- ]! V2 F' G( V; }& D/ I
Motor Control) [; Q. A6 Y0 M# B# e/ v
Codecs and DSPs in Voiceband and Audio Applications
6 N0 w) A4 u) p/ V( U A Sigma-Delta ADC with Programmable Digital Filter
& w6 X9 R- g6 |# v q- p: XSECTION 10* d( [- ~) Y5 S/ R- n
HARDWARE DESIGN TECHNIQUES
- I( c, L. A2 }; ^& o& s Low Voltage Interfaces9 T$ J( p; j& }3 ?
Grounding in Mixed Signal Systems
! j) ~2 ?4 z/ Z& t# N Digital Isolation Techniques9 ^, ^& Y5 T& \) V. h
Power Supply Noise Reduction and Filtering# d; E: X; X% ?& q7 X+ m& G
Dealing with High Speed Logic: U0 S; x4 f* f
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发表于 2016-12-1 15:13
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