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SDR新书:Baseband Analog Circuits for Software Defined Radio
9 x5 Y) \& i" p; v
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Author:
7 U; S) x( \, @$ M _; b5 w# `4 N8 b! J$ h6 G8 u
VITO GIANNINI 5 s$ x: ?# B' W4 F
JAN CRANINCKX
& c, ^& ^0 J; s7 hANDREA BASCHIROTTO
2 B. k, M( J I2 bIMEC, Wireless Research, Leuven, Belgium
) N, y- ]4 ?1 H' `6 o" lIMEC, Wireless Research, Leuven, Belgium
, S6 w. o9 `5 P* iUniversity of Salento, Italy
. \6 d: d4 d5 U% `; n* G# p
5 i0 @# I* l. m, B5 H3 ~% T$ W" g% v( Y: k8 Q
Contents
7 W& g; _6 x! h( T, ?: u% b. tDedication v / @& W4 ^/ I+ k9 T: C
Preface xi 2 @& ~9 A3 A6 K' I- ^# N" }
Acknowledgments xv
9 P' J' C3 o( R1. 4G MOBILE TERMINALS 1 ; W: t1 }' H; L& [7 ~4 K5 m8 ]
1.1 A Wireless-Centric World 1
5 f) c; G; o2 U. q3 `1.2 The Driving Forces Towards 4G Systems 3 1 B- F; C1 k. [
1.3 Basic Architecture For a 4G Terminal 6
/ f5 D, I" @3 p. S/ H C8 R1.4 The Role of Analog Circuits 8
" e3 s& d1 W' R2 T6 j1.5 Energy-Scalable Radio Front End 9 # r4 x, c5 T, ?. m) O0 ^
1.6 Towards Cognitive Radios 11 , d% ?; }; Z9 U& I% v- A6 z
2. SOFTWARE DEFINED RADIO FRONT ENDS 13
8 l6 U; u% ^% S9 V; I) O+ G2.1 The Software Radio Architecture 13 % v3 S; {9 {! y" M3 k: r
2.2 Candidate Architectures for SDR Front Ends 16
0 X% ]* @$ r, f N' m% r; J2.2.1 Heterodyne and digital-IF receivers 17
5 Y" @' f8 z; _2 W) v6 f6 [ m2.2.2 Zero-IF receivers 19
3 N, Y# L$ T* z$ \2.2.3 Digital low-IF receivers 22
# }3 `& c4 N" Y3 Y, G: u2.2.4 Bandpass sampling receivers 24 & u( m: F2 r% P! i! J7 i
2.2.5 Direct RF sampling receivers 26 % o3 X: b% x8 m
2.3 SDR Front End Implementation 27 1 E- t$ w5 w0 P/ }
2.3.1 LNA and input matching 29
: I+ T; Y" z `" A' f8 }2 s2.3.2 Frequency synthesizer 30 % n% Z' D* k4 s9 p# g7 K, ^4 r& F# _
2.3.3 Baseband signal processing 31 - v* j$ A; J w5 w7 }, u4 E. A3 F
2.3.4 Measurements results 31
$ x8 `# x" S- X: ~1 A2.4 Digital Calibration of Analog Imperfections 33
( A) u$ D$ g. C) a; L! I" J2.4.1 Quadrature imbalance 34
) P0 g0 h9 \. ]2.4.2 DC offset 36
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Contents
$ M/ C% n5 H5 z, y& l. a& m$ h2.4.3 Impact of LPF spectral behavior 36
" x- P2 M2 F4 J$ u% k- O3 }2.5 Conclusions 37 : j4 U* ^% Z% x% K# W
3. LINK BUDGET ANALYSIS IN THE SDR ANALOG
' K. K+ _8 v8 N* ~) wBASEBAND SECTION 39 - j( I9 ]5 b0 t
3.1 Analog Baseband Signal Processing 39 . C1 F) \2 n/ Q' l
3.2 Baseband Trade-Offs for Analog to Digital Conversion 40
3 f) `6 S# q. ^. U3.2.1 Number of poles for the LPF 41
2 s' ~2 Y: u) g1 \! t8 A& F% L3.2.2 ADC dynamic range 42 , S- ]( W9 i: `+ f
3.2.3 Baseband power consumption estimation 47 # S# j. V V6 J9 \1 S1 \: c
3.3 Multistandard Analog Baseband Specs 48
+ f; b- u" [$ w: t3.4 Multimode Low-Pass Filter 49 9 A2 [; [4 `8 g. W/ R" t- A8 ^; h
3.4.1 Filter selectivity 50
6 L1 C7 a( n9 x3.4.2 Filter noise and linearity 54
+ a. X/ U; ~8 [$ M Y3.4.3 Filter flexibility planning 56
1 @* v: X1 e9 j* ~- V* ]3.4.4 Cascade of biquadratic sections 59 5 t" {& O6 b3 I( K. d( C
3.5 Automatic Gain Control 62 7 F+ R8 w6 R) a% \6 n3 f9 X
3.6 Conclusions 65
% ?2 e7 O$ y! m2 `/ K4. FLEXIBLE ANALOG BUILDING BLOCKS 67 " E- D: d- Z# N. a9 \3 ^! E! t
4.1 Challenges in Analog Design for Flexibility 67
' _8 _5 w/ h- e) w% e- g4.2 A Modular Design Approach 68
+ \; q. P- A* c( T4.3 Flexible Operational Amplifiers 70
2 V) I+ Q- ~6 |9 K' c0 p' V4.3.1 Variable current sources 70 # V, [; n- g( a4 b* r
4.3.2 Arrays of operational amplifiers 71 : S+ I- }5 {3 ?* u( r) l
4.4 A Digital-Controlled Current Follower 75 ( K3 ^+ ~6 _% L6 G* S z$ o
4.5 Flexible Passive Components 75
- j# B2 \; C b+ I* l' ]4 @! ?- @; Y4.6 Flexible Transconductors 77 / b( R( i( i: `; u' x' x, e' K
4.7 Flexible Biquadratic Sections 78 # T4 V8 t/ g4 ^& _
4.7.1 The Active-Gm-RC biquad 79 1 q( V4 c6 O) K( L9 M
4.8 Conclusions 91
1 V) Z3 r5 J; L ~& j5. IMPLEMENTATIONS OF FLEXIBLE FILTERS FOR SDR 9 `& u, [4 M3 a( F- V
FRONT END 93
; T7 ?8 [8 _6 v8 P S. r5 I5.1 State of the Art for Flexible CT Filters 93 - D9 t$ T2 j2 D) i$ m! n; J
5.2 A Reconfigurable UMTS/WLAN Active-Gm-RC LPF 94
! D9 q$ ~% B4 r* O7 |: S5.2.1 Filter architecture 96 7 u+ W8 u- N2 s3 Y. `% g0 f, S
5.2.2 Automatic RC calibration scheme 97
6 [: }8 t2 [2 v7 O/ M6 R5.2.3 Measurements results 1028 Y, f- f0 F8 a C5 _7 \
Contents
- C) [+ J" \/ G+ s; i% }ix
5 S& S. v( X5 S! n5.3 LPF and VGA for SDR Front End 105 + l- Z7 n( E' }5 n1 T: O
5.3.1 LPF and VGA architectures 107
5 x" F# N9 K% H) W5.3.2 Prototype measurements 111 / L% F$ X& R& F) k2 B% l! [
5.4 Conclusions 118
0 L2 e% M% O) S2 ]( l- R1 uAcronyms 119 ( @6 s) O+ Q% k) J' i
List of Figures 123 * S) y+ P8 h6 a3 K' x
List of Tables 129 " H% m" O8 k" s5 S, g
References 131
8 M i4 L* N# R9 e/ wIndex 1398 ~+ f' i- h# R
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