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LBSALE[10]LBSALEMIXED-SIGNAL AND DSP DESIGN TECHNIQUES
" ~* r1 f# y! d: r6 S" p1 n/ gSECTION 1$ K. T: k2 D5 W3 e
INTRODUCTION: h0 F4 n4 a* N. C) i5 `
SECTION 2
& U O2 y# Y4 ]" O7 p9 a0 \SAMPLED DATA SYSTEMS0 V3 @( z+ i& ^+ `( T$ w
Discrete Time Sampling of Analog Signals
+ U/ a/ M) \4 Q& D. L ADC and DAC Static Transfer Functions and DC Errors
/ V# k H3 J2 n, s# D AC Errors in Data Converters( l3 i% Q8 Z7 ]3 d0 s( ?
DAC Dynamic Performance
& ~4 G- i3 K* m3 S/ uSECTION 3
* t, D( r( y! o- _% q: FADCs FOR DSP APPLICATIONS6 U, q( |" C. D
Successive Approximation ADCs4 N7 P9 G4 N) I5 a4 l9 @3 B j$ M
Sigma-Delta ADCs6 R: U1 r: r4 @5 S! g4 N% ?% r X
Flash Converters
- v8 s1 A" m! t" N: f Subranging (Pipelined) ADCs
( X0 E2 h. a) Q, c& q Bit-Per-Stage (Serial, or Ripple) ADCs7 @3 t$ M- p4 u9 e# o
SECTION 4) \$ D; E4 {1 a. ?7 t/ A
DACs FOR DSP APPLICATIONS
+ g( J7 w# d L4 K DAC Structures# Y% W" j9 H" g4 S1 N# c' |
Low Distortion DAC Architectures4 R3 G4 K' h+ m* B! j* o. `5 e$ W& ?! V
DAC Logic' t+ O2 U' A# T5 w1 x$ ?9 w1 P
Sigma-Delta DACs& x; j" A# \1 }; |
Direct Digital Synthesis (DDS)
+ U, ?8 M2 g5 `: S3 S% ASECTION 54 L, D; I- k* S8 G3 e1 k
FAST FOURIER TRANSFORMS) x4 L( o2 q! }7 n% O
The Discrete Fourier Transform2 e5 \- a0 ~' d; G* x9 p, ?# S4 t5 o2 H
The Fast Fourier Transform7 \7 O) U' A Q- m
FFT Hardware Implementation and Benchmarks1 K/ n6 |; h0 G+ C9 e
DSP Requirements for Real Time FFT Applications# s6 a2 i2 A9 ^5 F
Spectral Leakage and Windowing1 Z; f! @3 R% M7 d0 O) b0 v4 Y0 _
SECTION 65 [8 U& `, M9 r% t7 y: F; K
DIGITAL FILTERS: A F9 H. J7 t$ x* b' D3 i
Finite Impulse Response (FIR) Filters
, Z& y6 Q( l- V5 M4 n Infinite Impulse Response (IIR) Filters8 N" O- b8 _1 W3 I. \+ ~% I
Multirate Filters
) s$ `5 n: @* X; f Adaptive Filters9 a+ f8 ~2 _ f; Q& H7 d
SECTION 7
. b H+ P6 S; h# z1 kDSP HARDWARE
& c& g, c# H E) V% Y; b Microcontrollers, Microprocessors, and Digital Signal
5 q- C; F- \8 ~" K* W3 rProcessors (DSPs)) Y! k/ m' _! X) z/ o
DSP Requirements
! P( r6 n% u, E& B _, @- q8 i" O ADSP-21xx 16-Bit Fixed-Point DSP Core
/ R- m& V. G+ f$ [0 Z5 g. X Fixed-Point Versus Floating Point. X3 V9 r! x2 S' R9 i9 m
ADI SHARC® Floating Point DSPs' b w8 e- ~2 w4 R; z+ h
ADSP-2116x Single-Instruction, Multiple Data (SIMD)0 n7 S! |3 D/ E# j2 X* _; @
Core Architecture! y' t$ w7 }5 }) W- w
TigerSHARC™: The ADSP-TS001 Static Superscalar5 C: t, ^' N3 C, N0 @7 w
DSP( f# ?7 O8 _2 C$ ?9 m: l2 R& `
DSP Benchmarks
% h f" d2 K& E# A DSP Evaluation and Development Tools
2 Q3 T& X0 I9 a1 NSECTION 8. P- I3 X3 y+ G: i9 ^ T$ m
INTERFACING TO DSPs
" y0 D: M) O# D. E( l8 M Parallel Interfacing to DSP Processors: Reading Data8 L5 t# K7 L4 P" [1 \# i
From Memory-Mapped Peripheral ADCs
% [" m$ B4 K9 w( |$ J9 a- C X Parallel Interfacing to DSP Processors: Writing Data to
$ v; u+ M" Q4 j! {- x! W1 LMemory-Mapped DACs5 }' `5 ~' ?: T$ v; G; j
Serial Interfacing to DSP Processors
, ?7 p8 e9 y$ X' Q0 G# Y! q" O Interfacing I/O Ports, Analog Front Ends, and Codecs to u6 @" ^$ ?4 w
DSPs& P6 x* m( F6 Y) k6 f
DSP System Interface
* T9 H6 ^2 _1 _6 I; BSECTION 9
5 I2 |: P8 |9 `; K, P0 P% p+ wDSP APPLICATIONS
3 H: p7 i5 r) d* d2 | High Performance Modems for Plain Old Telephone- e: V: ]9 {6 [0 t6 v$ D
Service (POTS)0 I* ^) b' F; j+ }
Remote Access Server (RAS) Modems
7 N# O) p4 V& `" K Z, Y! ? ADSL (Assymetric Digital Subscriber Line)
- K7 N; D L b" D" g( ? Digital Cellular Telephones5 t. b* M) ~+ Z+ y+ } X! | q" |" g& q
GSM Handset Using SoftFone™ Baseband Processor
: D7 q4 m [, r+ T; ~and Othello™ Radio
5 ~9 {# g. F) _3 A Analog Cellular Basestations% d4 o3 t1 B1 P1 R$ b* F
Digital Cellular Basestations
2 d) f0 |, V4 e; A Motor Control
1 K# [% |+ v7 y- m. p3 b9 ] Codecs and DSPs in Voiceband and Audio Applications9 p- t$ [1 x8 L: J
A Sigma-Delta ADC with Programmable Digital Filter
6 |1 S3 [& s) `+ PSECTION 102 Z% f5 b* w5 l% O/ Z/ Q4 X
HARDWARE DESIGN TECHNIQUES
, L8 h" {& `5 V4 U5 t Low Voltage Interfaces
0 y! `% m8 h- Y, s4 }, c) X0 B/ ^: R Grounding in Mixed Signal Systems" W4 g0 m# s( L9 p
Digital Isolation Techniques
* b& d$ S6 q( C& o6 N1 i9 Q, d% K Power Supply Noise Reduction and Filtering2 V4 _+ ]8 ? A
Dealing with High Speed Logic
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