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Checking for Invalid References8 j6 K( q6 y3 `3 O# ]- W- |
ERROR [DRC0026] This reference has already been assigned to a different package type. U2: SCHEMATIC1, EP2C20 BANK1 AND BANK2 (4.00, 2.10)
, Y5 q% ?6 n, b: i7 u) dERROR [DRC0026] This reference has already been assigned to a different package type. U2: SCHEMATIC1, EP2C20 BANK1 AND BANK2 (9.70, 2.00) . {' v( [. F/ c6 n J# Q
ERROR [DRC0026] This reference has already been assigned to a different package type. U2: SCHEMATIC1, EP2C20 BANK3 AND BANK4 (9.80, 2.10) 9 E7 S: a4 }/ a6 k
ERROR [DRC0026] This reference has already been assigned to a different package type. U2: SCHEMATIC1, EP2C20 BANK3 AND BANK4 (4.40, 2.10)
! w9 Q D+ b8 @, jERROR [DRC0026] This reference has already been assigned to a different package type. U2: SCHEMATIC1, EP2C20 BANK5 AND BANK6 (2.60, 2.30)
" Z6 u( h6 ]; S& Y' QERROR [DRC0026] This reference has already been assigned to a different package type. U2: SCHEMATIC1, EP2C20 BANK5 AND BANK6 (8.00, 2.30)
& L5 R' L5 @8 C9 t l7 a2 CERROR [DRC0026] This reference has already been assigned to a different package type. U2: SCHEMATIC1, EP2C20 POWER AND CONFIG (2.30, 1.40)
- y; V; j) D: V/ f0 h( f4 |ERROR [DRC0026] This reference has already been assigned to a different package type. U2: SCHEMATIC1, EP2C20 POWER AND CONFIG (4.40, 6.40)
$ F$ n9 _( N/ `2 j& ]/ k我调用元件的时候操作方法一样,但只有BANK7 AND BANK8 没有报错,其余几个都报错了.
: F/ l) `6 o0 {; ]还有就是我在多页原理图中使用分层端口符号,结果报错:
: X' B1 ]1 f! \+ ^$ }ERROR [DRC0003] Port has a type which is inconsistent with other ports on the net DRAM_CKE: SCHEMATIC1, EP2C20 BANK1 AND BANK2 (2.70, 4.80)
- M9 a8 o9 D$ f' P) y% d; j; `我是在一个电路图上设置端口为output,另一个图上则为input,结果就产生上面的错误,改成一致的就没问题了,但我不明白的是,从原理上说不是一个input,一个output才连接正常吗?为什么都是input或output才可以?我看网上下载的原理图也是一个input,一个output?
' i/ F- ^) X7 Y' g/ |不知道怎么办了5 a% s1 W- Y' M% Z7 x% s8 p
请教大家怎么修改啊.谢谢了
8 I7 K) P$ N/ n, Q' t1 ?- r: c% D9 S' ^# m' v) D% _2 }. V
[ 本帖最后由 elmma 于 2008-3-2 13:36 编辑 ] |
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