标题: Hotfix_SPB16.60.043_wint_1of1 [打印本页] 作者: zgyzgy 时间: 2015-2-15 23:37 标题: Hotfix_SPB16.60.043_wint_1of1 http://pan.baidu.com/s/1fehWy 年前分享下43。。。。。。5 q& [ O5 d/ C5 h 作者: mengshang 时间: 2015-2-16 06:08
43更新已趋近稳定了。作者: amaryllis 时间: 2015-2-16 09:08
年前居然还有福利，cadence还蛮拼的。楼主V5作者: qiuzhang 时间: 2015-2-16 09:15
谢谢，辛苦了作者: pzt648485640 时间: 2015-2-16 09:33
DATE: 02-13-2015 HOTFIX VERSION: 043 ; |* P8 ]( W, C=================================================================================================================================== 5 v1 A* \* x- x+ J+ P U- l6 zCCRID PRODUCT PRODUCTLEVEL2 TITLE 4 R+ Q* o! r) n& j===================================================================================================================================( v& I, r6 Z' c/ a# |" |# b# G
1259909 ADW DSN_FLOW Unlike Project Manager, parts cannot be copied from one design to another using ADW 2 K: r y) c/ Q* V, y1 x# |+ q1341092 ALLEGRO_EDITOR MANUFACT Export > PDF should show drill holes if the Filled option is selected ( R8 U9 P7 g1 i1356711 SPIF OTHER Unable to use PCB Router function with PA5700 license. # i' s3 b; Z ?2 W: R. d1357880 ALLEGRO_EDITOR INTERFACES Incorrect Step model view in Step Package mapping window( e- E& v0 c" J+ R% G# T
1362132 ALLEGRO_EDITOR DATABASE X hatch shape with cell High shows shape boundary error1 P/ M1 R8 \% Z- v+ `) k, ^
1362641 ALLEGRO_EDITOR INTERACTIV Unwanted apostrophes are added to ads_sdart and few other variables under File_management in User Preference) y1 A$ D/ e1 j5 m- V
1362771 ALLEGRO_EDITOR EDIT_ETCH Running AiDT displays an error; the tool crashes on subsequent runs 6 \0 |* z3 g8 S7 G2 [1363908 SIP_LAYOUT PLACEMENT SiP Layout crashes when refreshing symbols+ ~$ I0 w s1 P( j5 W+ c4 y
1364113 ALLEGRO_EDITOR MANUFACT NC drill output does not comply with NC Parameters if the unit is inconsistent1 S" `3 {3 d. n3 M) F* x S. R
1364146 PSPICE SIMULATOR Simulating the attached Design gives 'RPC Server is unavailable' Error.5 ^4 r" L2 {* D% [3 m. k
1364209 ALLEGRO_EDITOR INTERFACES STEP export: Allow for zero height and instance height change with PLACE_BOUND_TOP/BOTTOM1 r( M; i. t }, J# X6 W, f
1364329 CONCEPT_HDL CORE Show Physical Net Name causing netlisting errors 0 Z B2 ~0 j: X- o$ e3 J; U( n1364367 PCB_LIBRARIAN IMPORT_VIEWLOGIC viewlogic2con translator does not complete " n) F! ?3 M0 S2 w x- J1364771 ALLEGRO_EDITOR MANUFACT Incorrect Gerber created for mounting holes % I/ {5 H$ d- T7 i1 f1366415 CONCEPT_HDL CORE global navigation not working for few buses in the design 1 f% U9 ]6 Q! M" M) [1367650 SIP_LAYOUT IC_IO_EDITING Add Respace command to Symed app mode for I/O drivers0 ?) u t% ?6 Q- H
1368246 SIP_LAYOUT OTHER Cannot delete die(s) that were placed manually in a design0 d a7 `1 f$ ?7 C" b) o; a2 ~) w' _, }
1368889 ALLEGRO_EDITOR INTERFACES Unable to export incremental updates of the IDX baseline file 5 s. N( U/ V4 P+ A& R1369177 SIP_LAYOUT OTHER Add a new command to create a bounding shape' ?5 I' K0 u4 R1 p. k
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DATE: 01-30-2015 HOTFIX VERSION: 042 7 R1 R$ u2 G" V+ M- [' y# r===================================================================================================================================2 X* b1 e8 w5 I7 k8 Y
CCRID PRODUCT PRODUCTLEVEL2 TITLE % m- a5 L; Y( T" J=================================================================================================================================== ; y7 s% {: E- p# @& c1334361 ALLEGRO_EDITOR INTERACTIV ZCopy should be able to copy multiple clines 0 j7 p( w" i! r2 I! I# ~1348389 CIS PART_MANAGER Update selected part status should re-query every time the command is run9 a- c7 R! W7 W- Y; q$ L6 [* o4 V( |
1349342 ALLEGRO_EDITOR EDIT_ETCH Need information on how to resolve (SPMHA1-170): No available buffer identifiers.6 k3 o% E) C! U6 u& J- A# G4 Y
1349849 CIS OTHER Capture crashes on generating variant reports- E! y8 {* k$ Q/ y0 ]0 `
1349983 PSPICE SIMULATOR Simulation aborts if save data option is greater than 1 sec ' ]- C6 g5 {+ j1350477 PSPICE SIMULATOR RPC server is unavailable, R; }6 k ~; m
1353830 SIG_INTEGRITY SIMULATION xtalk analysis leads to crash ; p4 e. Z! ]/ B1354644 ALLEGRO_EDITOR EXTRACT Extracta does not extract a value for specific property 3 i7 B. c" O T1355337 ALLEGRO_EDITOR EDIT_ETCH Windows 8 Route Connect produces Buffer error. : t0 ` n+ Z- e1 z5 u- b* _1355522 SIP_LAYOUT IC_IO_EDITING Option to select reference point for alignment should be available when aligning single drivers$ ?/ [. M: Y( ^% ?4 R8 J8 ?
1355737 ALLEGRO_EDITOR EDIT_ETCH No available buffer identifiers cause loss of control in a routing phase + T4 U( D$ J3 e. t1356373 ALLEGRO_EDITOR DRC_CONSTR Design is crashing when attempting to update the DRCs. G. j' i# ~* \4 d5 M1356684 SIP_LAYOUT SYMB_EDIT_APPMOD Enhance highlight of swappable pins excluding the pin to be swapped to ; H* X4 t; J! B9 z6 t1358383 ALLEGRO_EDITOR MODULES mdd file is not created correctly * T& h% B- K! j4 g7 [9 A1358558 CONCEPT_HDL GLOBALCHANGE "Global Component Change" could not update parts. $ M' S9 ^; H6 w/ n7 h1359780 ALLEGRO_EDITOR EDIT_ETCH The board database crashes on using Route Connect after some editing of traces. 0 a5 _6 i7 ?3 u6 ^, j& e/ g0 e F1360416 SIP_LAYOUT OTHER SiP Design Variant not being created on the design5 |7 P, j' ]% t$ f1 u) l
1360630 FSP ALLEGRO_INTEGRAT For Fixed Internal and Fixed External nets, FSP shows net schedule difference in PCB Editor6 O [' j" u7 F
1361157 ALLEGRO_EDITOR GRAPHICS 3D view of footprint with STEP model not correct, although it shows correctly when footprint is placed on board file.2 X/ l: S4 R* G+ u/ M' R$ m& T
1361925 FSP DE-HDL_SCHEMATIC Port is not connected for the nets having netname as NC. 5 H! W# C" Y. t4 N/ ^; N1362865 CONSTRAINT_MGR OTHER Import logic is not creating model-defined differential pairs. 1 l8 O1 k( d a& J! u& ]# B3 f# ~# b3 k/ G. c/ Y9 Q 作者: rongzhai 时间: 2015-2-16 11:27
多谢分享作者: Maxim 时间: 2015-2-16 14:36
谢谢，辛苦了作者: wolfshiao 时间: 2015-2-17 09:13
感謝樓主的分享, + Q) j/ I' h1 t8 O7 e雖然沒跟著更新,但也是要感謝的啦!!作者: hensonman 时间: 2015-2-17 13:23
这补丁好大..作者: hensonman 时间: 2015-2-17 14:50
补丁装到一半提示选择next disk，是否有几个补丁要一起装作者: wangshilei 时间: 2015-2-17 15:13
niu作者: muller1981 时间: 2015-2-18 03:01
感謝樓主的佛心分享! 1 U" G6 o5 |. O$ T大感謝!~ / f7 H$ b$ d! ]5 e$ _作者: hydf 时间: 2015-2-18 11:02
谢谢，新春快乐！作者: cxt668 时间: 2015-2-18 14:11
更新的也太快了一点，坐等17.0版发布作者: nbxiong 时间: 2015-2-19 17:14
坐等17.0版发布作者: 螭虎 时间: 2015-2-22 17:36
Cadence更新很快啊！今年更新好多回了！作者: allanwang 时间: 2015-2-23 18:06
谢谢楼主分享！！！作者: micdot 时间: 2015-2-24 10:57
多谢，辛苦分享！作者: rollow 时间: 2015-2-26 11:20
话说，这么多更新到底更新了些什么啊作者: zxb0403 时间: 2015-3-2 13:29
谢谢分享！作者: 妞妞麻吉12 时间: 2015-3-2 14:52
收了~~感谢LZ分享~~
